Patents Assigned to XPEQT
  • Publication number: 20100007364
    Abstract: A testing apparatus for testing of integrated circuit devices at elevated temperatures comprises hot belt 111 is operable to transport integrated circuits from a main production line into a hot chamber 121 and thence onto a test area 122 within the hot chamber 121 and a cold belt 112 operable to receive integrated circuits from the test area 122 and transport them back to the main production line. Both the hot and cold belts 111, 112 are indexed stepwise, the indexing distance being equal to the separation of the pockets provided for receiving integrated circuits. In the test area 122 are four vacuum chucks 131a-131d each operable to pick an integrated circuit from adjacent pockets on the hot belt 111 and place it on corresponding test heads 133a-133d (via a corresponding repositioning means 132a-132d) for diagnostic testing at an elevated temperature.
    Type: Application
    Filed: September 11, 2007
    Publication date: January 14, 2010
    Applicant: XPEQT NV
    Inventor: Eddy Van Esch
  • Patent number: 6662631
    Abstract: A method and apparatus for evaluation of films, such as low-k thin films with nano-scale pores, are provided. The evaluation may include characterization of the pore structure, the characterization results in determining pore sizes, hence obtaining pore size data. Moreover, the characterization may result in a non-destructive evaluation of mechanical properties, in particular the Young's Modulus, or the effect of interfering physical & chemical factors such as Pore Killers. Further, in line monitoring or studying of pore structure porosity and pore size distribution (PSD) of low-k films and evaluation of the mechanical properties of porous low-k films simultaneously using the same set of experimental data is provided.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: December 16, 2003
    Assignees: Interuniversitair Microelektronica Centrum, Technokom-Centre Advanced Technology, XPEQT
    Inventors: Mikhail Rodionovich Baklanov, Konstantin Petrovich Mogilnikov, Karen Maex, Denis Shamiryan, Fedor Nikolaevich Dultsev
  • Publication number: 20030027438
    Abstract: Improved socket assembly structures that reduce the thermally induced stresses on socket assemblies by a novel combination of socket frame structures, materials and methods of connecting the ceramic slabs, that receive a packaged integrated circuit, with the frame structures, where the socket assembly includes an upper slab mounted on a frame structure and where the upper slab is connected with the frame structure along only one edge of the slab, thus allowing a relative movement between the slab and the frame structure at least in a direction generally perpendicular to the one edge, the slab having a plurality of pin holes to receive the leads of an electronic package. Furthermore, certain embodiments of the present invention provide a stiffener that is attached to the underside of the circuit board to help reduce the thermally induced deflection of the circuit board during elevated temperature testing.
    Type: Application
    Filed: June 25, 2002
    Publication date: February 6, 2003
    Applicant: XPEQT AG
    Inventor: Raf Dreesen