Abstract: The present disclosure relates to a method for preventing a maloperation of differential protection of an optical fiber caused by saturation of a single Current Transformer (CT) of 3/2 connection. By applying a combination of the differential judgment and the sub-CT current judgment, reliable identification of internal and external faults is ensured, and the problem of misjudging of the internal fault as the external fault can be prevented as well.

Abstract: The present disclosure relates to a method for quickly identifying disconnection of a Current Transformer (CT) in protection of a 3/2 connection mode based bus. The present disclosure can quickly and accurately identify the disconnection of the CT, thereby avoiding the problem of a maloperation in protection of a bus caused by the disconnection of the CT.

Abstract: A distributed test method applicable to a system-level test of intelligent high voltage equipment. The method includes: firstly, carrying out unified modeling on test equipment behaviors according to test requirements, and generating a general test case for ensuring accuracy and coordination of test behaviors and test time sequences under various work conditions; then, extracting, according to a feature element of role defining, sequence states of same roles from the general test case, and recombining the sequence states according to an execution sequence so as to form test sub-cases of the roles; finally, executing, by each piece of test equipment, corresponding test sub-cases to achieve cooperative linkage by means of information interaction, so as to accomplish entire process simulation of the test conditions.

Abstract: Sampling implementation method and device based on conventional sampling GOOSE trip mode. CPU of master NPI plug-in, after receiving a second pulse, transmits sampling pulse generation time and a transmission enable bit to FPGA of the master NPI plug-in at a fixed interval; after detecting the transmission enable bit, the FPGA of the master NPI plug-in judges whether time of its internal timer is greater than/equal to the sampling pulse generation time, if yes, generates a sampling pulse to FPGA of collection plug-in; after receiving sampling pulse, the collection plug-in carries out A/D sampling, and transmits sampled data to the master NPI plug-in; when detecting that all A/D samplings are completed, the master NPI plug-in transmits data packets to protection CPU plug-in. The device includes an MMI plug-in, a protection CPU plug-in, a master NPI plug-in and a collection plug-in. Protection maloperation is thereby reduced.