Abstract: One embodiment of the present invention includes multi-state current-switching magnetic memory element including a stack of two or more magnetic tunneling junctions (MTJs), each MTJ having a free layer and being separated from other MTJs in the stack by a seeding layer formed upon an isolation layer, the stack for storing more than one bit of information, wherein different levels of current applied to the memory element causes switching to different states.

Abstract: An embodiment of the present invention includes a multi-state current-switching magnetic memory element having a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer.

Abstract: One embodiment of the present invention includes a an embodiment of the present invention includes a non-volatile current-switching magnetic memory element including a bottom electrode; a pinning layer formed on top of the bottom electrode; a fixed layer formed on top of the pinning layer; a tunnel layer formed on top of the pinning layer; a first free layer formed on top of the tunnel layer; a granular film layer formed on top of the free layer; a second free layer formed on top of the granular film layer; a cap layer formed on top of the second layer; and a top electrode formed on top of the cap layer.

Abstract: One embodiment of the present invention includes a non-volatile magnetic memory element including layers any of which are graded.

Abstract: One embodiment of the present invention includes a memory element having a composite free layer including a first free sub-layer formed on top of the bottom electrode, a nano-current-channel (NCC) layer formed on top of the first free sub-layer, and a second free sub-layer formed on top of the NCC layer, wherein when switching current is applied to the memory element, in a direction that is substantially perpendicular to the layers of the memory element, local magnetic moments of the NCC layer switch the state of the memory element.

Abstract: One embodiment of the present invention includes a non-volatile magnetic memory element including a fixed layer, a barrier layer formed on top of the fixed layer, and a free layer formed on top of the barrier layer, wherein the electrical resistivity of the barrier layer is reduced by placing said barrier layer under compressive stress. Compressive stress is induced by either using a compressive stress inducing layer, or by using inert gases at low pressure during the sputtering process as the barrier layer is deposited, or by introducing compressive stress inducing molecules into the molecular lattice of the barrier layer.

Abstract: One embodiment of the present invention includes a diode-addressable current-induced magnetization switching (CIMS) memory element including a magnetic tunnel junction (MTJ) and a diode formed on top of the MTJ for addressing the MTJ.