Abstract: A spin-torque transfer memory random access memory (STTMRAM) cell is disclosed comprising a selected magnetic tunnel junction (MTJ) identified to be programmed; a first transistor having a first port, a second port and a gate, the first port of the first transistor coupled to the selected MTJ; a first neighboring MTJ coupled to the selected MTJ through the second port of the first transistor; a second transistor having a first port, a second port, and a gate, the first port of the second transistor coupled to the selected MTJ; a second neighboring MTJ coupled to the selected MTJ through the second port of the second transistor; a first bit/source line coupled to the second end of the selected MTJ; and a second bit/source line coupled to the second end of the first neighboring MTJ and the second end of the second neighboring MTJ.

Abstract: A spin-torque transfer memory random access memory (STTMRAM) element includes a fixed layer formed on top of a substrate and a a tunnel layer formed upon the fixed layer and a composite free layer formed upon the tunnel barrier layer and made of an iron platinum alloy with at least one of X or Y material, X being from a group consisting of: boron (B), phosphorous (P), carbon (C), and nitride (N) and Y being from a group consisting of: tantalum (Ta), titanium (Ti), niobium (Nb), zirconium (Zr), tungsten (W), silicon (Si), copper (Cu), silver (Ag), aluminum (Al), chromium (Cr), tin (Sn), lead (Pb), antimony (Sb), hafnium (Hf) and bismuth (Bi), molybdenum (Mo) or rhodium (Ru), the magnetization direction of each of the composite free layer and fixed layer being substantially perpendicular to the plane of the substrate.

Abstract: A multi-state spin-torque transfer magnetic random access memory (STTMRAM) is formed on a film and includes a first magnetic tunneling junctions (MTJ) having a first fixed layer, a first sub-magnetic tunnel junction (sub-MTJ) layer and a first free layer. The first fixed layer and first free layer each have a first magnetic anisotropy. The STTMRAM further includes a non-magnetic spacing layer formed on top of the first MTJ layer and a second MTJ formed on top of the non-magnetic spacing layer. The second MTJ has a second fixed layer, a second sub-MTJ layer and a second free layer. The second fixed and second free layers each have a second magnetic anisotropy, wherein at least one of the first or second magnetic anisotropy is perpendicular to the plane of the film.

Abstract: A sensing circuit includes a sense amplifier circuit having a first and second nodes through which a magnetic memory element is sensed. A first current source is coupled to the first node a second current source is coupled to the second node. A reference magnetic memory element has a resistance associated therewith and is coupled to the first node, the reference magnetic memory element receives current from the first current source. At least one memory element, having a resistance associated therewith, is coupled to the second node and receives current from the second current source. Current from the first current source and current from the second current source are substantially the same. The logic state of the at least one memory element is sensed by a comparison of the resistance of the at least one memory element to the resistance of the reference magnetic memory element.

Abstract: A multi-state low-current-switching magnetic memory element (magnetic memory element) comprising a free layer, two stacks, and a magnetic tunneling junction is disclosed. The stacks and magnetic tunneling junction are disposed upon surfaces of the free layer, with the magnetic tunneling junction located between the stacks. The stacks pin magnetic domains within the free layer, creating a free layer domain wall. A current passed from stack to stack pushes the domain wall, repositioning the domain wall within the free layer. The position of the domain wall relative to the magnetic tunnel junction corresponds to a unique resistance value, and passing current from a stack to the magnetic tunnel junction reads the magnetic memory element's resistance. Thus, unique memory states may be achieved by moving the domain wall.

Abstract: A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die.

Abstract: In accordance with a method of the present invention, a method of manufacturing a magnetic random access memory (MRAM) cell and a corresponding structure thereof are disclosed to include a multi-stage manufacturing process. The multi-stage manufacturing process includes performing a front end on-line (FEOL) stage to manufacture logic and non-magnetic portions of the memory cell by forming an intermediate interlayer dielectric (ILD) layer, forming intermediate metal pillars embedded in the intermediate ILD layer, depositing a conductive metal cap on top of the intermediate ILD layer and the metal pillars, performing magnetic fabrication stage to make a magnetic material portion of the memory cell being manufactured, and performing back end on-line (BEOL) stage to make metal and contacts of the memory cell being manufactured.