Patents Assigned to Yasuhiro Horiike
  • Patent number: 6280645
    Abstract: A wafer flattening process and system enables a reduction of the surface roughness of a wafer resulting from local etching. A silicon wafer W is brought into close proximity to a nozzle portion 20 to feed SF6 gas to an alumina discharge tube 2, a plasma generator 1 is used to cause plasma discharge and spray a first activated species gas from the nozzle portion 20 to the silicon wafer W side, an X-Y drive mechanism 4 is used to make the nozzle portion 20 scan to perform a local etching step. Then the silicon wafer W is moved away from the nozzle portion 20 and O2 gas and CF4 gas are fed to the alumina discharge tube. At this time, the O2 gas is set to be greater in amount than the CF4 gas. When this mixed gas is made to discharge to generate plasma, a second activated species gas diffuses from the nozzle portion 20 to the entire surface of the silicon wafer W.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: August 28, 2001
    Assignee: Yasuhiro Horiike and SpeedFam Co, Ltd.
    Inventors: Michihiko Yanagisawa, Shinya Iida, Yasuhiro Horiike
  • Patent number: 6155200
    Abstract: In an ECR plasma generator, radio frequency ranging from 3 to 300 MHz is applied from a radio frequency power supply to an electrode which is provided in a chamber having an exhaust system and which serves as a shower head for gas introduction, and power is supplied to a coil provided at the outer periphery of the chamber, so as to form a magnetic field an integer number of times as large as a resonant magnetic field corresponding to the applied radio frequency, parallel with the direction of an electric field and to generate ECR plasma in an atmosphere of the supplied process gas.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: December 5, 2000
    Assignees: Tokyo Electron Limited, Yasuhiro Horiike
    Inventors: Yasuhiro Horiike, Kohei Kawamura
  • Patent number: 6096176
    Abstract: A target and a wafer are opposed to each other in a processing vessel in the form of a quartz tube whose internal pressure can be reduced. A low bias voltage is applied to the wafer while Helicon wave plasma of high density is generated between the target and the wafer by an antenna disposed on the circumference of the processing vessel. The wafer is positioned near and outside a lower boundary of a region of the plasma. Deposition seeds from the target are ionized in the plasma region and accelerated vertically to be incident on the wafer and are deposited first on the bottoms of the grooves in a surface of the wafer. In burying deposition seeds in grooves and holes of high aspect ratios which are formed in the surface of the wafer, the deposition seeds can be deposited first on the bottoms without occurrence of voids.
    Type: Grant
    Filed: July 24, 1995
    Date of Patent: August 1, 2000
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited, Yasuhiro Horiike
    Inventors: Yasuhiro Horiike, Takayuki Fukasawa
  • Patent number: 5328558
    Abstract: An NF.sub.3 /H.sub.2 mixture as a feed gas for an etchant for etching an SiO.sub.2 film on an silicon wafer is used with a 1 : 160 NF.sub.3 /H.sub.2 mixed ratio. The mixture is made into plasma, and activated species of fluorine, hydrogen and nitrogen are supplied downstream to allow the species to be adsorbed in and on the SiO.sub.2 film. The NF.sub.3 /H.sub.2 mixed ratio of the mixture is so set as not to effect the etching of the SiO.sub.2 film under a chemical action. Then the adsorbed activated species are irradiated with Ar low energy ions so that the activated species are excited and etch the SiO.sub.2 film. During etching, the semiconductor wafer is maintained to about -100.degree. C. Less damage is caused to the silicon wafer and etching can be made in a high selection ratio.
    Type: Grant
    Filed: March 25, 1993
    Date of Patent: July 12, 1994
    Assignees: Tokyo Electron Limited, Yasuhiro Horiike
    Inventor: Kouhei Kawamura
  • Patent number: 5308791
    Abstract: An apparatus for processing the surface of an Si wafer includes a vacuum cleaning chamber in which said Si wafer is housed. He gas is supplied into the cleaning chamber and micro-wave and magnetic field are applied to the He gas to generate excited species which emit vacuum ultraviolet. The vacuum ultraviolet is radiated onto the wafer surface to enable its energy to cut bonds between Si atoms of said wafer and O atoms and forming a natural oxide film on the wafer surface. Ar gas is also supplied into the cleaning chamber to create ions of said Ar gas due to energy added from said excited species. Said ions are supplied onto the wafer surface to form floating potential above said wafer surface. Said ions collide against said wafer surface to eliminate O atoms from said wafer surface. A process chamber is connected to the cleaning chamber through a load lock chamber. Al film is formed on the wafer surface, from which the natural oxide film has been eliminated, in the process chamber.
    Type: Grant
    Filed: March 9, 1992
    Date of Patent: May 3, 1994
    Assignees: Tokyo Electron Limited, Yasuhiro Horiike
    Inventors: Yasuhiro Horiike, Kohei Kawamura
  • Patent number: 5290609
    Abstract: A dielectric film of a capacitor is formed using the plasma CVD apparatus. A thin Ta layer is deposited on a semiconductor wafer by using Ta(N(CH.sub.3).sub.2).sub.5 gas and H.sub.2 radicals. The thin Ta layer is then oxidized by O.sub.2 radicals to form a thin Ta.sub.2 O.sub.5 layer. An Si.sub.3 N.sub.4 layer is then formed on the Ta.sub.2 O.sub.5 layer by using SiH.sub.4 and NH.sub.3 gases. The Ta.sub.2 O.sub.5 layer and the Si.sub.3 N.sub.4 layer are alternately laminated one upon the other several times to form a dielectric film of laminated structure. The dielectric film can thus have a composition close to the stoichiometric composition and it can be made high in dielectric constant and excellent in withstand voltage.
    Type: Grant
    Filed: March 9, 1992
    Date of Patent: March 1, 1994
    Assignees: Tokyo Electron Limited, Yasuhiro Horiike
    Inventors: Yasuhiro Horiike, Kohei Kawamura