Abstract: Ferroelectric memory element having an MFIS structure including a silicon semiconductor substrate and an insulating film arranged above the silicon semiconductor substrate. The insulating film includes a low dielectric constant layer restraining film and a mutual diffusion preventive film so that an unnecessary, low dielectric constant layer is prevented from forming between the semiconductor substrate and the insulating film. A ferroelectric film is arranged on the insulating film. The low dielectric constant layer restraining film is thinner than the ferroelectric film.
Type:
Grant
Filed:
April 2, 2001
Date of Patent:
August 19, 2003
Assignees:
Yasuo Tarui, Nippon Precision Circuits Inc.
Abstract: An Si oxide film, an oriented paraelectric oxide thin film and an oriented ferroelectric thin film are laminated on an Si single crystal substrate having a region for a source and a drain. A conductor thin film is formed in a portion not covered with an insulating film. A laminated structure formed of the Si oxide film, the oriented paraelectric oxide thin film and the oriented ferroelectric thin film is used as a gate of a transistor. The Si oxide film functions as a carrier injection inhibiting layer.
Abstract: An Si oxide film, an oriented paraelectric oxide thin film and an oriented ferroelectric thin film are laminated on an Si single crystal substrate having a region for a source and a drain. A conductor thin film is formed in a portion not covered with an insulating film. A laminated structure formed of the Si oxide film, the oriented paraelectric oxide thin film and the oriented ferroelectric thin film is used as a gate of a transistor. The Si oxide film functions as a carrier injection inhibiting layer.
Abstract: A ferroelectric thin film is produced on a substrate placed in an oxygen gas atmosphere within a reaction chamber. Evaporated source materials (organic metal compounds) are separately introduced in a predetermined sequence into the reaction chamber to produce a PZT or PLZT layer structure having an estimated stoichiometric composition. This cycle of introduction of the source materials is repeated continuously to produce a PZT or PLZT ferroelectric thin film having a predetermined number of PZT or PLZT layer structures piled on the substrate.
Type:
Grant
Filed:
September 14, 1994
Date of Patent:
October 7, 1997
Assignees:
Nissan Motor Co., Ltd., Sharp Kabushiki Kaisha, Yasuo Tarui