Abstract: A method for planarizing the surface of a semiconductor wafer or device during manufacture. Dependencies of polish rate and substrate thickness on process parameters of downforce and polish speed, and on the characteristic product high feature area on the wafer, are explicitly defined and used to control Chemical-Mechanical Polish in Run-to-Run and real-time semiconductor production control applications.
Abstract: A system and method for estimating errors within a semiconductor fabrication process. The system identifies an optimal number of error components based upon relevant context items. The system further estimates the error within the fabrication process and attributes portions of the error to each of the identified error components based upon feedback data received from the manufacturing process.
Abstract: A system and method for controlling critical dimension in a semiconductor manufacturing process. The system 10 controls critical dimension by altering focus and exposure settings, based on a single measured attribute (i.e., critical dimension) and on a process model equation. The system 10 further systematically varies focus and exposure settings (e.g., by introducing variable deviation values), in order to provide unique and stable solutions for parameters within the process model equation.
Abstract: A system and method for yield management is disclosed wherein a data set containing one or more prediction variable values and one or more response values is input into the system. The system can pre-process the input data set to remove prediction variables with missing values and data sets with missing values. The pre-processed data can then be used to generate a model that may be a decision tree. The system can accept user input to modify the generated model. Once the model is complete, one or more statistical analysis tools can be used to analyze the data and generate a list of the key yield factors for the particular data set.
Type:
Grant
Filed:
December 8, 1999
Date of Patent:
October 22, 2002
Assignee:
Yield Dynamics, Inc.
Inventors:
Weidong Wang, Jonathan B. Buckheit, David W. Budd