Patents Assigned to Yieldboost Tech, Inc.
  • Patent number: 7154292
    Abstract: A system and method for detecting defects in TFT-array panels is provided that improves defect detection accuracy by adjusting the thresholding parameters used to classify defective pixels in accordance with the standard deviation of the measured pixel voltages. The present invention is particularly suited for the testing of TFT-array panels that contain more pixels than can be measured by the sensor of the TFT-array tester in a single measurement. The system and method of the present invention calculates the standard deviation of the measured pixel voltages at each measurement point, and adjusts the thresholding parameters based on the calculated standard deviation. Accordingly, the system and method of the present invention helps to compensate for differences in the measured pixel voltages between measurement points due to environmental factors or other causes.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: December 26, 2006
    Assignee: Yieldboost Tech, Inc.
    Inventor: Kyo Young Chung
  • Patent number: 7064572
    Abstract: A system and method of monitoring LCD production yields, predicting the effects of different testing methodologies on LCD production yields, and optimizing production yields is provided that compares the effect of different testing methodologies on the yields at various stages in the LCD testing and assembly process. The present invention can also be used to predict the effect of different testing methodologies on user-defined parameters, such as profit.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: June 20, 2006
    Assignee: Yieldboost Tech Inc.
    Inventor: Kyo Young Chung
  • Patent number: 7053645
    Abstract: A system and method for detecting a defect in a transistor array includes applying a test signal to the array, monitoring pixel voltages along a gate line of the array, and detecting a defect associated with the gate line based on a variation in the pixel voltages along the gate line during the monitoring step. The system and method can also detect a precise location of the defect based on a rate of change in the variation of the pixel voltages along the gate line.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: May 30, 2006
    Assignee: YieldBoost Tech, Inc.
    Inventor: Kyo Young Chung
  • Patent number: 7042244
    Abstract: A system and method for detecting defects in TFT-array panels is provided that improves defect detection accuracy by adjusting the thresholding parameters used to classify defective pixels in accordance with the standard deviation of the measured pixel voltages. The present invention is particularly suited for the testing of TFT-array panels that contain more pixels than can be measured by the sensor of the TFT-array tester in a single measurement. The system and method of the present invention calculates a reference pixel voltage at each pixel based on a low frequency component of the measured pixel voltage, and adjusts the thresholding parameters based on the calculated reference pixel voltage.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: May 9, 2006
    Assignee: Yieldboost Tech Inc.
    Inventor: Kyo Young Chung
  • Patent number: 7024338
    Abstract: A system and method for detecting defects in TFT-array panels is provided that improves defect detection accuracy by adjusting the thresholding parameters used to classify defective pixels when the number of defects reported by a TFT-array testing system exceeds a predetermined critical number. In a preferred embodiment, the thresholding parameters are adjusted until the number of reported defects is less than or equal to the predetermined critical number. The predetermined critical number represents a threshold number for determining if the number of reported defects is abnormally high.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: April 4, 2006
    Assignee: Yieldboost Tech, Inc.
    Inventor: Kyo Young Chung
  • Patent number: 6996446
    Abstract: A system and method of monitoring LCD production yields, predicting the effects of different testing methodologies on LCD production yields, and optimizing production yields is provided that compares the effect of different testing methodologies on the yields at various stages in the LCD testing and assembly process. The present invention can also be used to predict the effect of different testing methodologies on user-defined parameters, such as profit.
    Type: Grant
    Filed: May 14, 2003
    Date of Patent: February 7, 2006
    Assignee: Yieldboost Tech Inc.
    Inventor: Kyo Young Chung
  • Patent number: 6982556
    Abstract: A method for performing circuit defect analysis and process problem identification includes applying a test signal to a circuit, obtaining a signal generated in response to the test signal, comparing the response signal to reference information, classifying a defect in the circuit based on a result of the comparing step, and identifying a problem in a manufacturing process which caused the defect based on the classification. The reference information may include one or more signal profiles corresponding to predefined types of defects that can occur during the manufacturing process. Defect classification is preferably performed by determining whether the response signal falls within one or more of the signal profiles. If the response signal falls within two or more signal profiles, then probabilities may be determined for each profile. The defect may then be classified as corresponding to the defect type whose signal profile has the highest probability.
    Type: Grant
    Filed: August 25, 2003
    Date of Patent: January 3, 2006
    Assignee: YieldBoost Tech, Inc.
    Inventor: Kyo Young Chung
  • Patent number: 6960927
    Abstract: A system and method of monitoring LCD production yields, predicting the effects of different testing methodologies on LCD production yields, and optimizing production yields is provided that compares the effect of different testing methodologies on the yields at various stages in the LCD testing and assembly process. The present invention can also be used to predict the effect of different testing methodologies on user-defined parameters, such as profit.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: November 1, 2005
    Assignee: Yieldboost Tech. Inc.
    Inventor: Kyo Young Chung
  • Patent number: 6949944
    Abstract: A system and method of monitoring LCD production yields, predicting the effects of different testing methodologies on LCD production yields, and optimizing production yields is provided that compares the effect of different testing methodologies on the yields at various stages in the LCD testing and assembly process. The present invention can also be used to predict the effect of different testing methodologies on user-defined parameters, such as profit.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: September 27, 2005
    Assignee: Yieldboost, Tech. Inc.
    Inventor: Kyo Young Chung
  • Patent number: 6888368
    Abstract: A system and method of monitoring LCD production yields, predicting the effects of different testing methodologies on LCD production yields, and optimizing production yields is provided that compares the effect of different testing methodologies on the yields at various stages in the LCD testing and assembly process. The present invention can also be used to predict the effect of different testing methodologies on user-defined parameters, such as profit.
    Type: Grant
    Filed: April 15, 2003
    Date of Patent: May 3, 2005
    Assignee: Yieldboost Tech, Inc.
    Inventor: Kyo Young Chung
  • Patent number: 6862489
    Abstract: A system and method of monitoring LCD production yields, predicting the effects of different testing methodologies on LCD production yields, and optimizing production yields is provided that compares the effect of different testing methodologies on the yields at various stages in the LCD testing and assembly process. The present invention can also be used to predict the effect of different testing methodologies on user-defined parameters, such as profit.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: March 1, 2005
    Assignee: Yieldboost Tech, Inc.
    Inventor: Kyo Young Chung
  • Patent number: 6850086
    Abstract: A system and method of monitoring LCD production yields, predicting the effects of different testing methodologies on LCD production yields, and optimizing production yields is provided that compares the effect of different testing methodologies on the yields at various stages in the LCD testing and assembly process. The present invention can also be used to predict the effect of different testing methodologies on user-defined parameters, such as profit.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: February 1, 2005
    Assignee: Yieldboost Tech, Inc.
    Inventor: Kyo Young Chung
  • Publication number: 20040246015
    Abstract: A system and method for detecting a defect in a transistor array includes applying a test signal to the array, monitoring pixel voltages along a gate line of the array, and detecting a defect associated with the gate line based on a variation in the pixel voltages along the gate line during the monitoring step. The system and method can also detect a precise location of the defect based on a rate of change in the variation of the pixel voltages along the gate line.
    Type: Application
    Filed: June 6, 2003
    Publication date: December 9, 2004
    Applicant: YIELDBOOST TECH, INC.
    Inventor: Kyo Young Chung
  • Publication number: 20040249608
    Abstract: A system and method for detecting a defect in a transistor array includes applying a test signal to the array, monitoring pixel voltage along a gate line of the array, and detecting a defect associated with the gate line based on a variation in the pixel voltage during the monitoring step. The defect may be a short between the gate line and a common line of the array. The gate line and common line may be associated with a same pixel element or different pixel elements. The system and method also detect a precise location of the defect based on a rate of change in the variation of the pixel voltage along the gate line. The rate of change may be measured in any one of a variety of ways. For example, the rate of change may be measured as a sudden increase or increase of the pixel voltage or as a change in slope of a pixel voltage profile. Alternatively, the location of the defect may be detected as corresponding to a minimum or maximum value in a pixel voltage profile.
    Type: Application
    Filed: August 15, 2003
    Publication date: December 9, 2004
    Applicant: YieldBoost Tech, Inc.
    Inventor: Kyo Young Chung
  • Publication number: 20040232940
    Abstract: A system and method for detecting defects in TFT-array panels is provided that improves defect detection accuracy by adjusting the thresholding parameters used to classify defective pixels in accordance with the standard deviation of the measured pixel voltages. The present invention is particularly suited for the testing of TFT-array panels that contain more pixels than can be measured by the sensor of the TFT-array tester in a single measurement. The system and method of the present invention calculates a reference pixel voltage at each pixel based on a low frequency component of the measured pixel voltage, and adjusts the thresholding parameters based on the calculated reference pixel voltage.
    Type: Application
    Filed: June 28, 2004
    Publication date: November 25, 2004
    Applicant: YieldBoost Tech, Inc.
    Inventor: Kyo Young Chung
  • Publication number: 20040150407
    Abstract: A system and method of monitoring LCD production yields, predicting the effects of different testing methodologies on LCD production yields, and optimizing production yields is provided that compares the effect of different testing methodologies on the yields at various stages in the LCD testing and assembly process. The present invention can also be used to predict the effect of different testing methodologies on user-defined parameters, such as profit.
    Type: Application
    Filed: May 28, 2003
    Publication date: August 5, 2004
    Applicant: YieldBoost Tech, Inc.
    Inventor: Kyo Young Chung
  • Publication number: 20040153182
    Abstract: A system and method of monitoring LCD production yields, predicting the effects of different testing methodologies on LCD production yields, and optimizing production yields is provided that compares the effect of different testing methodologies on the yields at various stages in the LCD testing and assembly process. The present invention can also be used to predict the effect of different testing methodologies on user-defined parameters, such as profit.
    Type: Application
    Filed: April 15, 2003
    Publication date: August 5, 2004
    Applicant: YieldBoost Tech, Inc.
    Inventor: Kyo Young Chung
  • Publication number: 20040150408
    Abstract: A system and method for detecting defects in TFT-array panels is provided that improves defect detection accuracy by adjusting the thresholding parameters used to classify defective pixels when the number of defects reported by a TFT-array testing system exceeds a predetermined critical number. In a preferred embodiment, the thresholding parameters are adjusted until the number of reported defects is less than or equal to the predetermined critical number. The predetermined critical number represents a threshold number for determining if the number of reported defects is abnormally high.
    Type: Application
    Filed: August 19, 2003
    Publication date: August 5, 2004
    Applicant: YIELDBOOST TECH, INC.
    Inventor: Kyo Young Chung
  • Publication number: 20040150760
    Abstract: A system and method for detecting defects in TFT-array panels is provided that improves defect detection accuracy by adjusting the thresholding parameters used to classify defective pixels in accordance with the standard deviation of the measured pixel voltages. The present invention is particularly suited for the testing of TFT-array panels that contain more pixels than can be measured by the sensor of the TFT-array tester in a single measurement. The system and method of the present invention calculates the standard deviation of the measured pixel voltages at each measurement point, and adjusts the thresholding parameters based on the calculated standard deviation. Accordingly, the system and method of the present invention helps to compensate for differences in the measured pixel voltages between measurement points due to environmental factors or other causes.
    Type: Application
    Filed: March 17, 2003
    Publication date: August 5, 2004
    Applicant: YieldBoost Tech, Inc.
    Inventor: Kyo Young Chung
  • Publication number: 20040153179
    Abstract: A system and method of monitoring LCD production yields, predicting the effects of different testing methodologies on LCD production yields, and optimizing production yields is provided that compares the effect of different testing methodologies on the yields at various stages in the LCD testing and assembly process. The present invention can also be used to predict the effect of different testing methodologies on user-defined parameters, such as profit.
    Type: Application
    Filed: January 31, 2003
    Publication date: August 5, 2004
    Applicant: YieldBoost Tech, Inc.
    Inventor: Kyo Young Chung