Patents Assigned to YIXING SILICON VALLEY ELECTRONICS TECH CO., LTD.
  • Patent number: 11083091
    Abstract: Disclosed are a hole connecting layer manufacturing method, a circuit board manufacturing method and a circuit board. The hole connecting layer manufacturing method comprises: adhering a first insulating dielectric layer, used for laminating and filling, to a daughter board; laminating and solidifying the first insulating dielectric layer on the daughter board; adhering a second insulating dielectric layer, used for laminating and filling, to the first insulating dielectric layer which has been laminated and solidified; manufacturing a first receiving hole on the first insulating dielectric layer and a second receiving hole on the second insulating dielectric layer, wherein the first receiving hole and the second receiving hole are provided vertically opposite to each other; filling both the first receiving hole and the second receiving hole with a conductive medium to complete manufacturing of the hole connecting layer.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: August 3, 2021
    Assignees: GUANGZHOU FASTPRINT CIRCUIT TECH CO., LTD., SHENZHEN FASTPRINT CIRCUIT TECH CO., LTD., YIXING SILICON VALLEY ELECTRONICS TECH CO., LTD.
    Inventors: Zeyang Lian, Sen Wu, Yanguo Li, Bei Chen