Patents Assigned to YT Networks Capital, LLC
  • Patent number: 8116315
    Abstract: The present invention provides method for data packet processing in a telecommunications system. The method of the present invention can include the steps of (i) determining a set of classification parameters for a data packet at an ingress edge unit, wherein the classification parameters include a packet destination, (ii) communicating the data packet to an egress edge unit and (iii) routing the data packet to a destination egress port at the egress edge unit according the classification parameters determined at the ingress edge unit. In one embodiment of the present invention, the classification parameters can include a destination egress edge unit, a destination egress port at the destination egress edge unit, and quality of service parameter for proper processing of the data packet.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: February 14, 2012
    Assignee: YT Networks Capital, LLC
    Inventor: Nolan J. Posey, Jr.
  • Patent number: 7869427
    Abstract: The invention includes systems and methods for improving the performance of non-blocking data switching systems. One embodiment of the invention includes a method comprising routing data from a plurality of inputs to a plurality of outputs through a switching core according to a first switching schedule, receiving a first set of reports comprising reports from data sources associated with the plurality of inputs, evaluating one or more reports of the first set of reports, determining a sufficiency of the first switching schedule based on the one or more reports, adapting a second switching schedule, wherein the second switching schedule differs from the first switching schedule, sending the second switching schedule to the data sources, issuing one or more synchronization signals associated with a transition to the second switching schedule to the data sources and routing data from the plurality of inputs to the plurality of outputs through the switching core according to the second switching schedule.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: January 11, 2011
    Assignee: YT Networks Capital, LLC
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Patent number: 7526203
    Abstract: Embodiments of the present invention provide a system and method for providing non-blocking routing of optical data through an optical switch fabric. The optical switch fabric can include an optical switching matrix with a plurality of inputs intersecting with a plurality of outputs. A path switch can be located at each intersection that is operable to switch data arriving on an input to a particular output. The path switches can be configurable to create a plurality of unique paths through the optical switching matrix to allow routing in a non-blocking manner. Another aspect of the present invention can provide a system and method for providing non-blocking routing through an optical cross-bar switch. The optical cross-bar switch includes a plurality of input links, a plurality of output links and a plurality of switching elements.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: April 28, 2009
    Assignee: YT Networks Capital, LLC
    Inventor: Lakshman S. Tamil
  • Patent number: 7496033
    Abstract: Methods and systems for dynamically computing a schedule defining interconnections between ports in a switching system. In one embodiment, a switching core requests demand reports from the ingress ports. In response to this request, the ingress ports generate a series of suggested port schedules, beginning with a first choice, then a second choice, and so on. The schedules are transmitted to the switching core, beginning with the first choice. The switching core receives the first choice for each of the ports and determines whether the aggregate schedule defined by the first choices is valid. If the aggregate schedule is valid, then this schedule is implemented. If the aggregate schedule is not valid, portions of it are discarded and the next choice from each of the ports is examined to identify connections to replace the discarded portions. This process is repeated until a valid schedule is obtained.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: February 24, 2009
    Assignee: YT Networks Capital, LLC
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Publication number: 20090028560
    Abstract: A non-blocking optical matrix core switching method that includes maintaining a schedule for routing data through an optical matrix core and receiving and analyzing reports from peripheral devices. The method determines whether the schedule is adequate for the current data traffic patterns and if the schedule is not adequate a new schedule is implemented. The new schedule is then transferred to the peripheral devices for implementation and the new schedule is transferred to the optical matrix core scheduler. Implementation of the new schedule as the schedule on the peripheral devices and the optical matrix core scheduler is then performed.
    Type: Application
    Filed: August 4, 2008
    Publication date: January 29, 2009
    Applicant: YT NETWORKS CAPITAL, LLC
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Patent number: 7474853
    Abstract: A non-blocking optical matrix core switching method that includes maintaining a schedule for routing data through an optical matrix core and receiving and analyzing reports from peripheral devices. The method determines whether the schedule is adequate for the current data traffic patterns and if the schedule is not adequate a new schedule is implemented. The new schedule is then transferred to the peripheral devices for implementation and the new schedule is transferred to the optical matrix core scheduler. Implementation of the new schedule as the schedule on the peripheral devices and the optical matrix core scheduler is then performed.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: January 6, 2009
    Assignee: YT Networks Capital, LLC
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Patent number: 7443790
    Abstract: The present invention provides a system and method for slot deflection routing of optical data packets. The method of the present invention includes the steps of establishing a schedule pattern that includes a plurality of time slots. The schedule pattern includes at least one time slot in which an ingress edge unit can communicate with a destination egress edge unit, at least one time slot in which the ingress edge unit can communicate with a intermediate edge unit, and at least one time slot in which the intermediate edge unit can communicate with the destination egress edge unit. The present invention also includes receiving a data packet at the ingress edge unit and determining if the schedule pattern allocates sufficient bandwidth to send the data packet from the ingress edge unit to the destination egress edge unit without deflecting the data packet through an intermediate edge unit.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: October 28, 2008
    Assignee: YT Networks Capital, LLC
    Inventors: Gregory H. Aicklen, Lakshman S. Tamil
  • Publication number: 20080247423
    Abstract: Systems and methods for conveying multiple low-bit-rate data streams over a data transport medium which is configured to transport data in a single, high-bit-rate data stream. In one embodiment, a plurality of low-bit-rate signals are received and a corresponding data rate is determined. Each of the signals is formatted in frames comprising a payload and overhead data. The high-bit-rate signal is also formatted in frames comprising a payload and overhead data, but the frames (including payload and overhead) contain more bits than those of the low-bit-rate frames. The payloads of the low-bit-rate frames are mapped into the payloads of the high-bit-rate frames. The overhead and timing data of the low-bit-rate frames are mapped into the unused portion of the overhead of the high-bit-rate frames. After the high-bit-rate signal is transported, the payload, overhead and timing data of each of the low-bit-rate signals is extracted, and the corresponding signals are reproduced.
    Type: Application
    Filed: June 12, 2008
    Publication date: October 9, 2008
    Applicant: YT NETWORKS CAPITAL, LLC
    Inventors: Hosagrahar Somashekhar, G. Hari
  • Patent number: 7426210
    Abstract: One embodiment of the present invention includes a router comprising an ingress edge unit with one or more ports and an egress edge unit with one or more ports connected by a switch fabric. The ingress edge unit can receive optical data and convert the optical data into a plurality of micro lambdas. The ingress edge unit can convert the incoming data to micro lambdas by generating a series of short-term parallel data bursts across multiple wavelengths. The ingress edge unit can also wavelength division multiplex and time domain multiplex each micro lambda for transmission to the switch fabric in a particular order. The switch fabric can receive the plurality of micro lambdas and route the plurality of micro lambdas to the plurality of egress edge units in a non-blocking manner.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: September 16, 2008
    Assignee: YT Networks Capital, LLC
    Inventors: Larry L. Miles, Lakshman S. Tamil, Scott A. Rothrock, Nolan J. Posey, Jr., Gregory H. Aicklen
  • Patent number: 7421053
    Abstract: Systems and methods for aligning the phase of a PLL with an incoming data signal. In one embodiment, when a data signal is received in a PLL, a phase perturbation signal is generated and injected into the PLL. The PLL then performs a phase alignment procedure to lock on to the received data signal. The phase perturbation signal is a damped sinusoidal oscillation that is injected into the PLL when each of a plurality of data packets is received. The perturbation signal has an amplitude sufficient to bump the PLL out of a quasi-stable state around 180 degrees out of phase with the incoming data signal, but is damped to less than a degree of phase shift within 30 ns of being injected.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: September 2, 2008
    Assignee: YT Networks Capital, LLC
    Inventors: Bing Li, David Wolf, James Plesa, Lakshman S. Tamil
  • Patent number: 7400657
    Abstract: Systems and methods for conveying multiple low-bit-rate data streams over a data transport medium which is configured to transport data in a single, high-bit-rate data stream. In one embodiment, a plurality of low-bit-rate signals are received and a corresponding data rate is determined. Each of the signals is formatted in frames comprising a payload and overhead data. The high-bit-rate signal is also formatted in frames comprising a payload and overhead data, but the frames (including payload and overhead) contain more bits than those of the low-bit-rate frames. The payloads of the low-bit-rate frames are mapped into the payloads of the high-bit-rate frames. The overhead and timing data of the low-bit-rate frames are mapped into the unused portion of the overhead of the high-bit-rate frames. After the high-bit-rate signal is transported, the payload, overhead and timing data of each of the low-bit-rate signals is extracted, and the corresponding signals are reproduced.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: July 15, 2008
    Assignee: YT Networks Capital, LLC
    Inventors: Hosagrahar Somashekhar, Gopalakrishnan Hari