Patents Assigned to Zeevo
  • System method and apparatus for a three-line balun with power amplifier bias
    Patent number: 6982609
    Abstract: A balun that includes a first conductor, a second conductor and a third conductor. The first conductor has a length of about one quarter wavelength of a selected center frequency. The first conductor also has a first end connected to a first balanced power amplifier output port. The second conductor has a length of about one quarter wavelength of the selected center frequency. The second conductor also includes a first end connected to a second balanced power amplifier output port and a second end connected a second end of the first conductor. The third conductor has a length of about one quarter wavelength of the selected center frequency. The third conductor has a first end connected to an antenna port and a second end connected to a ground potential.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: January 3, 2006
    Assignee: Zeevo
    Inventors: Tom McKay, Vas Postoyalko, Edwin Li
  • System method and apparatus for a three-line balun with power amplifier bias
    Publication number: 20050200425
    Abstract: A balun that includes a first conductor, a second conductor and a third conductor. The first conductor has a first length. The first conductor also has a first end connected to a first balanced power amplifier output port. The second conductor has substantially the same first length. The second conductor also includes a first end connected to a second balanced power amplifier output port and a second end connected a second end of the first conductor. The third conductor has substantially the same first length. The third conductor has a first end connected to an antenna port and a second end connected to a ground potential.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 15, 2005
    Applicant: ZEEVO
    Inventors: Tom McKay, Vas Postoyalko, Edwin Li
  • Single ended tuning of a differential power amplifier output
    Patent number: 6844792
    Abstract: A system and method for compensating a parasitic capacitance on a differential amplifier output includes a first differential output and a second differential output of the differential amplifier. The first differential output coupled to the second differential output by a first conductor that has a length of about one half wavelength. The first and the second differential outputs have a parasitic capacitance that can be measured. A second conductor is coupled to the first differential output. The second conductor having a length that is less than or equal to about one quarter wavelength and has an inductive reactance that offsets a capacitive reactance of the parasitic capacitance.
    Type: Grant
    Filed: September 23, 2002
    Date of Patent: January 18, 2005
    Assignee: Zeevo
    Inventors: James Koeppe, Tom McKay, Vas Postoyalko