Abstract: Methods and apparatus for code-based asymmetric cryptosystem using Quasi-Cyclic Moderate-Density Parity-Check (QC-MDPC) error correcting codes. Specifically, the method and apparatus generalizes the framework of (QC-MDPC) Code-Based (CB) cryptography from the binary domain (Galois Field of two elements) to an arbitrary size of Galois Field and provides an apparatus for implementing the cryptosystem with a simplified computational complexity of key generation, encryption, and decryption components of the cryptosystems and reduced sizes of the public and private security keys.

Abstract: In a calibration method, high-accuracy reference values obtained using a high-accuracy optical sensor are received, low-accuracy reference values are determined from reference colors captured from a display using a low-accuracy optical sensor having a lower accuracy than the high-accuracy optical sensor, color measurement values are determined from one or more colors captured from the display using the low-accuracy optical sensor, and the color measurements values are adjusted based on one or more color conversion equations to obtain adjusted color measurement values. The one or more color conversion equations are based on the high-accuracy measurement values and the low-accuracy measurement values. The high-accuracy reference values are reused for calibrations of one or more other low-accuracy optical sensors.

Abstract: Methods and apparatus for code-based asymmetric cryptosystem using Quasi-Cyclic Moderate-Density Parity-Check (QC-MDPC) error correcting codes. Specifically, the method and apparatus generalizes the framework of (QC-MDPC) Code-Based (CB) cryptography from the binary domain (Galois Field of two elements) to an arbitrary size of Galois Field and provides an apparatus for implementing the cryptosystem with a simplified computational complexity of key generation, encryption, and decryption components of the cryptosystems and reduced sizes of the public and private security keys.

Abstract: A method and apparatus for encoding data and for decoding data using LDPC (low density parity check) codes includes providing a mother LDPC matrix of a particular size. A data payload of a smaller size is encoded by shortening the mother matrix to a smaller daughter matrix corresponding in size to the data payload and using the smaller daughter matrix for the encoding. The portions of the mother matrix to be removed in the shortening are derived from a control signal. The encoded data is transmitted with the control signal so that the receiver can derive the portions of the mother matrix to be removed to obtain the daughter matrix. At the receiver, a mother matrix is shortened to a daughter matrix and is then used to decode the data. The data at the encoder may be further reduced by puncturing to remove selected information bits and selected parity bits. The decoder inserts the selected information bits and parity bits when decoding the data.

Abstract: A method and apparatus for encoding data and for decoding data using LDPC (low density parity check) codes includes providing a mother LDPC matrix of a particular size. A data payload of a smaller size is encoded by shortening the mother matrix to a smaller daughter matrix corresponding in size to the data payload and using the smaller daughter matrix for the encoding. The portions of the mother matrix to be removed in the shortening are derived from a control signal. The encoded data is transmitted with the control signal so that the receiver can derive the portions of the mother matrix to be removed to obtain the daughter matrix. At the receiver, a mother matrix is shortened to a daughter matrix and is then used to decode the data. The data at the encoder may be further reduced by puncturing to remove selected information bits and selected parity bits. The decoder inserts the selected information bits and parity bits when decoding the data.

Abstract: A method and apparatus for encoding data and for decoding data using LDPC (low density parity check) codes includes providing a mother LDPC matrix of a particular size. A data payload of a smaller size is encoded by shortening the mother matrix to a smaller daughter matrix corresponding in size to the data payload and using the smaller daughter matrix for the encoding. The portions of the mother matrix to be removed in the shortening are derived from a control signal. The encoded data is transmitted with the control signal so that the receiver can derive the portions of the mother matrix to be removed to obtain the daughter matrix. At the receiver, a mother matrix is shortened to a daughter matrix and is then used to decode the data. The data at the encoder may be further reduced by puncturing to remove selected information bits and selected parity bits. The decoder inserts the selected information bits and parity bits when decoding the data.

Abstract: A mobile device is bonded to a controllable device by reading a code on the controllable device, banding the mobile device to the controllable device by use of the code, and transmitting a remote control signal from the mobile device to control a controllable function of the bonded controllable device so that only the bonded controllable device responds to the remote control signal by performing the controllable function.

Abstract: A method and apparatus for encoding data and for decoding data using LDPC (low density parity check) codes includes providing a mother LDPC matrix of a particular size. A data payload of a smaller size is encoded by shortening the mother matrix to a smaller daughter matrix corresponding in size to the data payload and using the smaller daughter matrix for the encoding. The portions of the mother matrix to be removed in the shortening are derived from a control signal. The encoded data is transmitted with the control signal so that the receiver can derive the portions of the mother matrix to be removed to obtain the daughter matrix. At the receiver, a mother matrix is shortened to a daughter matrix and is then used to decode the data. The data at the encoder may be further reduced by puncturing to remove selected information bits and selected parity bits. The decoder inserts the selected information bits and parity bits when decoding the data.

Abstract: A method and system for processing an Orthogonal Frequency Division Multiplexed (OFDM) signal. The system includes a signal source configured to provide a sequence of ordered data values and a corresponding sequence of ordered addresses. A plurality of processors includes a first processor and a last processor, wherein the first processor is coupled to the signal source. Each processor is configured to pass the data values without modification and modify the addresses of the corresponding data values. The system further includes a memory coupled to the last processor. The memory is configured to store each data value from the last processor at a corresponding modified address of the memory provided by the last processor.

Abstract: An antenna for broadcast television programming includes a tuner and demodulator located with the antenna to generate a demodulated television program stream. A network interface is connected to the tuner and demodulator to provide the television program stream to a network, preferably a wireless network. A television set located remotely from the antenna receives the television program stream via the network and displays the program. A portable control device may be connected to the network. Reception of the broadcast programming is improved by controlling the directionality of the antenna in response to the demodulated signal. A service provider may poll the wireless network antenna to determine which broadcast programs are received and may provide extended programming television programs to the user by an internet connection to the user's network.

Abstract: A method and system for processing an Orthogonal Frequency Division Multiplexed (OFDM) signal. The system includes a signal source configured to provide a sequence of ordered data values and a corresponding sequence of ordered addresses. A plurality of processors includes a first processor and a last processor, wherein the first processor is coupled to the signal source. Each processor is configured to pass the data values without modification and modify the addresses of the corresponding data values. The system further includes a memory coupled to the last processor. The memory is configured to store each data value from the last processor at a corresponding modified address of the memory provided by the last processor.

Abstract: Adaptive low complexity minimum mean square error (MMSE) channel estimator for OFDM systems operating over mobile channel. Complexity of the estimator is reduced by partitioning sub-carriers into windows where, window size is optimized by considering channel model mismatch error (MME). Three types of adaptive windowed MMSE (W-MMSE) estimators include: A first type, a simplified delay profile applied as channel reference model, and optimum window size adaptive to the estimated signal-to-noise ratio. A second type, a group of candidate channel reference models are considered. The receiver roughly estimates and selects current reference model from candidate group, then adapts optimum window size based on the estimated SNR and selected channel model. A third type, the current channel statistics are finely estimated and window size is iteratively optimized at receiver.

Abstract: In a central television diagnostics system, a plurality of remotely located televisions are connected to a central television distribution facility. The remote televisions each have a microprocessor receiving signal quality values and a memory for storing the quality values. One of the quality values comprises a base line measurement value and another comprises a current measurement value. The microprocessor selectively displays on a display of said television a history of said measurement values upon command by a user or service technician desiring to diagnose the status of signal quality at said television.

Abstract: Mobile/handheld (M/H) data is received in an M/H frame equivalent in size to exactly 20 VSB data frames. Each VSB frame contains an odd VSB field and an even VSB field, and each of the VSB fields includes one field sync segment and 312 data segments. The M/H frame includes main data and M/H data, and the M/H data has more robust coding than the main data. The M/H frame is received and an MPEG encoded transport stream derived therefrom is outputted. Frame registration is found so as to find a structure of the M/H frame in the MPEG encoded transport stream. Based on the structure of the M/H frame, the M/H data is randomized. Based on the structure of the M/H frame, block mode data is located within the randomized M/H data. The M/H data is decoded using the block mode data.

Abstract: In a central television diagnostics system, a plurality of remotely located televisions are connected to a central television distribution facility. The remote televisions each have a microprocessor receiving signal quality values and a memory for storing the quality values. One of the quality values comprises a base line measurement value and another comprises a current measurement value. The microprocessor selectively displays on a display of said television a history of said measurement values upon command by a user or service technician desiring to diagnose the status of signal quality at said television.

Abstract: A receiver timing error recovery loop expands the bandwidth of a received signal and determines the timing error based on the bandwidth expanded received signal.

Abstract: A receiver includes an equalizer and a decoder which decodes data from a signal. The signal is based upon an output of the equalizer. The receiver also includes an encoder, which re-encodes the decoded data, and an error generator, which generates an error vector based upon the signal and the encoded data and which weights the error vector according to a reliability that the decoder accurately decoded the data from the signal. A controller controls the equalizer in response to the weighted error vector.

Abstract: A repeater receives an input signal containing mobile/handheld (M/H) data received in an M/H frame equivalent in size to 20 VSB data frames. Each VSB frame contains an odd VSB field and an even VSB field, and each of the VSB fields includes one field sync segment and 312 data segments. The M/H frame includes main data and M/H data, and the M/H data has more robust coding than the main data. The received input signal is demodulated to produce an MPEG transport steam. Frame registration is used to find data and field syncs in the MPEG transport steam. The trellis encoder is reset prior to M/H training data in to the mobile data stream. The data is VSB modulated, the field syncs are added to the modulated data to reconstruct the M/H frame, and the M/H frame upconverted to an RF output signal, which is retransmitted.

Abstract: Normally ordered robust VSB data are reordered in accordance with a first interleave to produce reordered robust VSB data. The reordered robust VSB data and ATSC data are reordered in accordance with a second interleave to produce normally ordered robust VSB data and reordered ATSC data. The normally ordered robust VSB data and reordered ATSC data are time multiplexed for transmission to a receiver. The receiver discards the reordered ATSC data or the normally ordered robust VSB data depending upon receiver type or user selection. A robust VSB receiver is able to process the normally ordered robust VSB data upstream of an outer decoder without an interleave thereby avoiding the delay associated with an interleave.

Abstract: A receiver timing error recovery loop expands the bandwidth of a received signal and determines the timing error based on the bandwidth expanded received signal.