Abstract: A rechargeable battery comprises a casing, a power receiving module, a charge management module, a storage capacitor, a positive electrode, and a negative electrode. The power receiving module is for outputting an input power. The charge management module is disposed in the casing and electrically connected to the power receiving module to receive the input power and convert the input power to a charge power. The storage capacitor, which is a supercapacitor or a lithium-ion capacitor, is disposed in the casing and electrically connected to the charge management module, and the charge power charges the storage capacitor. The positive electrode and the negative electrode are disposed at the casing and partly exposed outside the casing. The positive electrode and the negative electrode are electrically connected to the storage capacitor to supply an output power.

Abstract: A detection device for detecting a line quality of an electric circuit includes two electrical connection members inserted into a socket and connected to two power lines, a load resistor, a switching member, a displaying module, and a control module. An end of the load resistor is connected to one of the electrical connection members, and another end thereof is connected to a first end of the switching member. A second end of the switching member is connected to the other electrical connection member. The control module controls the switching member to cut off when in a detection mode, and detects a peak voltage in a voltage waveform and records as a maximum open-circuit voltage, and controls the switching member to conduct and detects the peak voltage of the voltage waveform and records as a load voltage and calculates a load current. A line resistance value is calculated based on the maximum open-circuit voltage, the load voltage, and the load current.

Abstract: A game control device includes a processing module, at least one button, a signal transceiving module, a time pulse generation module, and a communication module, which are electrically connected to the processing module. When the button is pressed, the processing module generates a corresponding button code, and uses the current clocking time as absolute pressing time, and generates a button packet including a button code and a pressing time. The processing module sends the button packet via the communication module. A game system includes a server and a plurality of hosts, which are connected through the Internet. The hosts are connected to the abovementioned game control devices respectively. Each host receives the button packet sent from each game control device, and sends the button packet to the server. The server determines the press order of the each button according to the absolute pressing time in the received button packet.

Abstract: A method of broadcasting a game includes the following steps. During a game process, a server receives videos and audios that are obtained by a plurality of first computers and generates a first video file. The first video file is sent to a second computer. The second computer displays a first video file through a monitor, wherein a screen of the first video file does not include contents of concealed hand tiles of the player. A method for joining a game includes the following steps. The server receives a starting command from a starting computer to open a new game, wherein the starting command includes at least one bidding condition of the new game. The server receives a bidding command of a participating computer, and then determines that bidding price of the bidding command is complied with the bidding condition, the participating computer could be joined into the new game.

Abstract: A detection device for detecting a line quality of an electric circuit includes two electrical connection members inserted into a socket and connected to two power lines, a load resistor, a switching member, a displaying module, and a control module. An end of the load resistor is connected to one of the electrical connection members, and another end thereof is connected to a first end of the switching member. A second end of the switching member is connected to the other electrical connection member. The control module controls the switching member to cut off when in a detection mode, and detects a peak voltage in a voltage waveform and records as a maximum open-circuit voltage, and controls the switching member to conduct and detects the peak voltage of the voltage waveform and records as a load voltage and calculates a load current. A line resistance value is calculated based on the maximum open-circuit voltage, the load voltage, and the load current.

Abstract: An external control device for a game controller is provided, including a casing, a second adapter, a mode selector, a memory, and a conversion circuit. The second adapter is provided for being connected to the first adapter of the game controller. The mode selector is provided for outputting one of selection signals. The memory stores different encode data. The conversion circuit selects encode data according to the selection signals output from the mode selector, and encodes and converts the button signal into a pre-formatted wireless signal according to the selected encode data, and then sends the pre-formatted wireless signal through a wireless signal transmitting circuit. Thus, the button signal of the game controller is converted into a wireless signal corresponding to another game console providing another game control device integrating the game controller with the external control device, which has the same effect.

Abstract: A game control device includes a processing module, at least one button, a signal transceiving module, a time pulse generation module, and a communication module, which are electrically connected to the processing module. When the button is pressed, the processing module generates a corresponding button code, and uses the current clocking time as absolute pressing time, and generates a button packet including a button code and a pressing time. The processing module sends the button packet via the communication module. A game system includes a server and a plurality of hosts, which are connected through the Internet. The hosts are connected to the abovementioned game control devices respectively. Each host receives the button packet sent from each game control device, and sends the button packet to the server. The server determines the press order of the each button according to the absolute pressing time in the received button packet.

Abstract: A bus packet format displaying method for a logic analyzer is disclosed. The logic analyzer fetches at least one packet of a bus of an electronic device. A computer host divides a plurality of bits of a second packet section of the packet into a plurality of message partitions according to a predetermined format defined in advance. Each of the message partitions has a value. The computer host gives a message name to each of the message partitions corresponding to the values and displays the message names and the values fetched by the logic analyzer on an operating screen.

Abstract: An external control device for a game controller is provided, including a casing, a second adapter, a mode selector, a memory, and a conversion circuit. The second adapter is provided for being connected to the first adapter of the game controller. The mode selector is provided for outputting one of selection signals. The memory stores different encode data. The conversion circuit selects encode data according to the selection signals output from the mode selector, and encodes and converts the button signal into a pre-formatted wireless signal according to the selected encode data, and then sends the pre-formatted wireless signal through a wireless signal transmitting circuit. Thus, the button signal of the game controller is converted into a wireless signal corresponding to another game console providing another game control device integrating the game controller with the external control device, which has the same effect.

Abstract: A bus packet format displaying method for a logic analyzer is disclosed. The logic analyzer fetches at least one packet of a bus of an electronic device. A computer host divides a plurality of bits of a second packet section of the packet into a plurality of message partitions according to a predetermined format defined in advance. Each of the message partitions has a value. The computer host gives a message name to each of the message partitions corresponding to the values and displays the message names and the values fetched by the logic analyzer on an operating screen.

Abstract: A graphic transaction method and a system for utilizing the same are disclosed. The graphic transaction method includes steps of: photographing a product corresponding to at least one sales target to form at least one first graphic; providing the at least one first graphic to a customer's side; receiving a second graphic transmitted back from the customer's side, the second graphic including the at least one first graphic on which a first tag is added by the customer's side; and identifying the second graphic and generating a first list according to the first tag. Whereby, the construction of transaction model between mutual sides is based on graphics. It can provide intuition-type transaction experience and can be applied to various sales targets of different sellers.

Abstract: A logic analyzer includes a probe, an FPGA module, a first transmission interface, a storage module, and a second transmission interface. A method of retrieving data includes the following steps: retrieving a digital signal through the probe, integrating the digital signal into a piece of signal data through the FPGA module, retrieving the piece of signal data through the first transmission interface, saving the piece of signal data in the storage module through the first transmission interface with a first transmission rate, returning the piece of signal data saved in the storage module to the FPGA module through the first transmission interface, receiving and transmitting the piece of signal data to the computer through the second transmission interface with a second transmission rate, whereby to save the piece of signal data therein.

Abstract: A reliability and performance analysis system is disclosed. The reliability and performance analysis system includes a logic analyzer and a server. The logic analyzer includes a set of probes capable of retrieving signals of a digital device. The retrieved signals are integrated and stored into a storage module of the logic analyzer. The retrieved signals are then transmitted to a remote server which are utilized to select specific signals to analyze the reliability and performance of the digital device. The storage module can increase the stability of the logic analyzer such that the logic analyzer can proceed a long-term signal retrieving process and a user can obtain an analysis result by connecting to the server directly.

Abstract: A method of scheduling plan with digital communication system is disclosed. The digital communication system includes a server, a first user, and a second user, which are signal connected. The first user and the second user respectively restore a first calendar and a second calendar. The method includes the following steps. The server retrieves the calendars stored in the users, and analyzes and obtains periods unscheduled in the calendars, and then sends the periods unscheduled to the first user. The first user selects one of the periods, and inputs a plan information, and sends said period and the plan information to the server. The server sends the received period and the plan information to the second user. The second user enters the period and the plan information to the second calendar.

Abstract: A logic analyzer includes a probe, a first transmission line, a display, a second transmission line, and a processing unit. The probe is adapted to abut against a DUT to retrieve digital signals therefrom. The first transmission line is electrically connected to the probe. The display is provided on the probe. The second transmission line is electrically connected to the display. The processing unit is electrically connected to the first transmission line and the second transmission line, and is adapted to be electrically connected to a computer. The digital signal retrieved by the probe would be transmitted to the processing unit through the first transmission line to be analyzed therein. After completing the analysis, an analysis result would be transmitted to the computer for display. Meanwhile, a part of the analysis result is transmitted to the display through the second transmission line to be displayed thereon.