Abstract: We disclose herein a semiconductor device sub-assembly comprising: a plurality of semiconductor units laterally spaced to one another; a plurality of conductive blocks, wherein each conductive block is operatively coupled with each semiconductor unit; a conductive malleable layer operatively coupled with each conductive block, wherein the plurality of conductive blocks are located between the conductive malleable layer and the plurality of semiconductor units. In use, at least some of the plurality of conductive blocks are configured to apply a pressure on the conductive malleable layer, when a predetermined pressure is applied to the semiconductor device sub-assembly.
Type:
Grant
Filed:
January 23, 2017
Date of Patent:
September 15, 2020
Assignees:
DYNEX SEMICONDUCTOR LIMITED, ZHUZHOU CRRC TIMES ELECTRONIC CO. LTD.