Abstract: A semiconductor device and method of fabricating the device. An emitter region is formed self centered and self aligned symmetrically with a base region. Using frontside processing techniques, a collector is formed symmetrically self-aligned with the base region and the emitter region. The collector region may be further formed self-centered with the base region using backside processing techniques. The self-aligned and self-centered symmetric structure virtually eliminates parasitic elements in the device significantly improving the device performance. The device is scalable on the order of approximately 0.1 microns. The method also provides reproduceability and repeatability of device characteristics necessary for commercial manufacture of the symmetric device.

Abstract: A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. One etching process The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and SiO2. The surfaces to be bonded are polished to a high degree of smoothness and planarity. VSE may use reactive ion etching or wet etching to slightly etch the surfaces being bonded. The surface roughness and planarity are not degraded and may be enhanced by the VSE process. The etched surfaces may be rinsed in solutions such as ammonium hydroxide or ammonium fluoride to promote the formation of desired bonding species on the surfaces.

Abstract: A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.

Abstract: A process for bonding oxide-free silicon substrate pairs and other substrates at low temperature. This process involves modifying the surface of the silicon wafers to create defect regions, for example by plasma-treating the surface to be bonded with a or boron-containing plasmas such as a B2H6 plasma. The surface defect regions may also be created by ion implantation, preferably using boron. The surfaces may also be amorphized. The treated surfaces are placed together, thus forming an attached pair at room temperature in ambient air. The bonding energy reaches approximately 400 mJ/M2 at room temperature, 900 mJ/M2 at 150° C., and 1800 mJ/M2 at 250° C. The bulk silicon fracture energy of 2500 mJ/m2 was achieved after annealing at 350-400° C. The release of hydrogen from B—H complexes and the subsequent absorption of the hydrogen by the plasma induced modified layers on the bonding surfaces at low temperature is most likely responsible for the enhanced bonding energy.

Abstract: A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.