Patents Assigned to Ziptronix
  • Publication number: 20020164839
    Abstract: A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.
    Type: Application
    Filed: July 5, 2002
    Publication date: November 7, 2002
    Applicant: Ziptronix
    Inventor: Paul M. Enquist
  • Publication number: 20020100916
    Abstract: A semiconductor device and method of fabricating the device. An emitter region is formed self centered and self aligned symmetrically with a base region. Using frontside processing techniques, a collector is formed symmetrically self-aligned with the base region and the emitter region. The collector region may be further formed self-centered with the base region using backside processing techniques. The self-aligned and self-centered symmetric structure virtually eliminates parasitic elements in the device significantly improving the device performance. The device is scalable on the order of approximately 0.1 microns. The method also provides reproduceability and repeatability of device characteristics necessary for commercial manufacture of the symmetric device.
    Type: Application
    Filed: March 14, 2002
    Publication date: August 1, 2002
    Applicant: Ziptronix
    Inventor: Paul M. Enquist
  • Publication number: 20020094661
    Abstract: A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.
    Type: Application
    Filed: December 11, 2001
    Publication date: July 18, 2002
    Applicant: ZIPTRONIX
    Inventors: Paul M. Enquist, Gaius Fountain
  • Publication number: 20020064906
    Abstract: A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.
    Type: Application
    Filed: October 25, 2001
    Publication date: May 30, 2002
    Applicant: Ziptronix
    Inventor: Paul M. Enquist
  • Patent number: 6368930
    Abstract: A semiconductor device and method of fabricating the device. An emitter region is formed self centered and self aligned symmetrically with a base region. Using frontside processing techniques, a collector is formed symmetrically self-aligned with the base region and the emitter region. The collector region may be further formed self-centered with the base region using backside processing techniques. The self-aligned and self-centered symmetric structure virtually eliminates parasitic elements in the device significantly improving the device performance. The device is scalable on the order of approximately 0.1 microns. The method also provides reproduceability and repeatability of device characteristics necessary for commercial manufacture of the symmetric device.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: April 9, 2002
    Assignee: Ziptronix
    Inventor: Paul Enquist