IBM Patents

The International Business Machines Corporation provides IT infrastructure and services to enterprise customers.

IBM Patents by Type
  • IBM Patents Granted: IBM patents that have been granted by the United States Patent and Trademark Office (USPTO).
  • IBM Patent Applications: IBM patent applications that are pending before the United States Patent and Trademark Office (USPTO).
  • Patent number: 7119012
    Abstract: A method for forming a stabilized metal silicide film, e.g., contact (source/drain or gate), that does not substantially agglomerate during subsequent thermal treatments, is provided. In the present invention, ions that are capable of attaching to defects within the Si-containing layer are implanted into the Si-containing layer prior to formation of metal silicide. The implanted ions stabilize the film, because the implants were found to substantially prevent agglomeration or at least delay agglomeration to much higher temperatures than in cases in which no implants were used.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Roy A. Carruthers, Cedrik Y. Coia, Christophe Detavernier, Christian Lavoie, Kenneth P. Rodbell
  • Patent number: 7120691
    Abstract: A peer-to-peer network propagates searches from client to client. Resources within each client are selectively searched in response to authentication and authorization processes. Authentication information may be included in a search request or may be performed by an authentication process external to the client. Authorization is performed by a process external to the client. Only after authentication or authorization may resources of any particular client be accessed. The system allows for secure propagated searches and resource access in a peer-to-peer network environment. The network may further include a server for maintaining a list of clients connected to the peer-to-peer network in order to more efficiently facilitate peer-to-peer communications.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Brian D. Goodman, John W. Rooney, Ramesh Subramanian, William C. Sweeney
  • Patent number: 7120824
    Abstract: A method, apparatus and program storage device for maintaining data consistency and cache coherency during communications failures between nodes in a remote mirror pair. A link between a mirror pair of storage systems is monitored. During a link failure between a first storage system and a second storage systems, reads and writes on the first and second storage systems are independently performed and write data and associated timestamps are maintained for the write data for each write in a queue on the first and second storage system. After link reestablishment, volume sets on the first and second storage systems are resynchronized using write data and associated timestamps.
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: David Alan Burton, Noel Simen Otterness, Alan Lee Stewart
  • Patent number: 7120787
    Abstract: A method and system for managing a secure network boot of a secondary server (server blade). The server blade sends a request, via an Ethernet switch, for a boot program to multiple Dynamic Host Configuration Protocol (DHCP) servers. One of the DHCP servers responds with an address of at least one Pre-boot Execution Environment (PXE) server that can upload a boot program to the server blade. Only if the responding DHCP server is on a list of known trusted DHCP servers will the Ethernet switch allow the server blade to receive the response from the responding DHCP server, thus allowing the download of a boot program from a PXE server.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: October 10, 2006
    Assignee: International Business Machinces Corporation
    Inventors: Simon C. Chu, Richard A. Dayan, Gregory B. Pruett, David B. Rhoades
  • Patent number: 7120780
    Abstract: A microprocessor for processing instructions comprises multiple clusters for receiving the instructions, each of the clusters having a plurality of functional units for executing the instructions, multiple register sub-files each having multiple registers for storing data for executing the instructions, wherein each of the clusters is associated with corresponding one of the register sub-files so that an instruction dispatched to a cluster is executed by accessing registers in a register sub-file associated with the cluster to which the instruction is dispatched, a register-renaming unit for renaming target registers in an instruction with registers in a register sub-file associated with a cluster to which the instruction is dispatched, and issue-queue units each of which is associated with a corresponding one of the clusters, wherein an issue-queue unit holds instruction renamed by the register-renaming unit until the renamed instruction is issued to be executed in a cluster associated with the issue-queue u
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventor: Mayan Moudgill
  • Patent number: 7119511
    Abstract: A servo control system for a micro-electromechanical systems (MEMS)-based motion control system (and method therefor), includes a motion generator having an inherent stiffness component.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Sri M. Sri-Jayantha, Hien Dang, Arun Sharma, Evangelos S. Eleftheriou, Mark A. Lantz, Charalampos Pozidis
  • Patent number: 7118995
    Abstract: A method for determining a SiGe deposition condition so as to improve yield of a semiconductor structure. Fabrication of the semiconductor structure starts with a single-crystal silicon (Si) layer. Then, first and second shallow trench isolation (STI) regions are formed in the single-crystal Si layer. The STI regions sandwich and define a first single-crystal Si region. Next, silicon-germanium (SiGe) mixture is deposited on top of the structure in a SiGe deposition condition so as to grow (i) a second single-crystal silicon region grows up from the top surface of the first single-crystal silicon region and (ii) first and second polysilicon regions from the top surfaces of the first and second STI regions, respectively. By increasing SiGe deposition temperature and/or lowering precursor flow rate until the resulting yield is within a pre-specified range, a satisfactory SiGe deposition condition can be determined for mass production of the structure.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Mark D. Dupuis, Wade J. Hodge, Daniel T. Kelly, Ryan W. Wuthrich
  • Patent number: 7120748
    Abstract: The present invention provides a system for managing cache replacement eligibility. A first address register is configured to request an address from an L1 cache. An L1 cache is configured to determine whether a requested address is in the L1 cache and, in response to a determination that a requested address is not in the L1 cache, is further configured to transmit the requested address to a range register coupled to the L1 cache. The range register is configured to generate a class identifier in response to a received requested address and to transmit the requested address and class identifier to a replacement management table coupled to the range register. The replacement management table is configured to generate L2 tag replacement control indicia in response to a received requested address and class identifier. An L2 address register is coupled to the first address register and configured to request an address from an L2 cache.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Michael Norman Day, Harm Peter Hofstee, Charles Roy Johns, James Allan Kahle, David Shippy, Thuong Quang Truong, Takeshi Yamazaki
  • Patent number: 7120901
    Abstract: A method and system for tracing the failing or successful execution of nested functions coded with return codes in a thread during its execution. The method comprises an ENTRY and EXIT trace macro to mark the beginning and the end of execution of the function, a TRACE macro to record messages and program variable values, and a QUIT macro marking the failing execution of the corresponding function. Using a Graphical User Interface, an interactive trace analyzer reads the trace file and displays the tree structure of the nested functions and marks, by using different colors, the success or failure of each of them. The trace analyzer utilities help the user to quickly identify the error in the source code corresponding to a function with a failing execution.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Luca Ferri, Luigi Pichetti, Rosario Gangemi
  • Patent number: 7120019
    Abstract: A structure for cooling an electronic component includes a heat sink attached to the component, an inner air duct extending into a central portion of the heat sink, and an outer air duct extending into an outer portion of the heat sink. In inner fan, within the inner air duct, moves air in one direction, while an outer fan, in the outer air duct, moves air in the other direction. The fans may be built as separate rotors, or as separate portions of a single rotor.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Jimmy Grant Foster, Sr., Michael Sean June, Albert Vincent Makley, Jason Aaron Matteson
  • Patent number: 7120900
    Abstract: A bidirectional text display method embodied in a functional programming language which first assigns bidirectional attributes to a logical character stream. Next, through explicit processing, level numbers are assigned, honoring any directional overrides present in the logical character stream. Subsequent weak and neutral type processing potentially causes attribute types to change based upon surrounding attribute types. Then, implicit processing assigns final level numbers to the stream which control reordering. Finally, reordering processing produces a sequence of characters in display order. By separating the facets of layout dealing with reordering from those that are concerned with rendering, such as line breaking, glyph selection, and shaping, the Haskell-based method is more discernible and comprehendable, thereby allowing it to be more useful as a model upon which others may base bidirectional implementations.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: October 10, 2006
    Assignee: International Business Machines
    Inventor: Steven Edward Atkin
  • Patent number: 7120648
    Abstract: The invention relates to a system and method for predicting the elapsed time required to execute a database utility command. A base of historical data is maintained containing information relating to the elapsed time required for previous database utility commands to execute. The elapsed time for a database utility command provides a consolidated measurement of all factors that affect processing time, including amount and type of data stored as well as changes within the computer system environment. Upper and lower control limits are calculated using statistical process control techniques to predict database utility command execution times. The technique may be used to validate and/or edit database utility command files containing multiple database utility commands, based upon whether the commands contained within are likely to fully execute within a specified batch window.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: John M. Garth, James Alan Ruddy
  • Patent number: 7120870
    Abstract: Disclosed is a system, method, and program for displaying data on a display monitor under control of a computer. A first portion of a field of data and a graphical element indicating that there is a second portion of the field of data are displayed within a display area of a page, such as an HTML page. The page is enabled to selectively present the first and second portions of the field of data in response to user input.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventor: Lee Evan Nakamura
  • Patent number: 7117583
    Abstract: A method and apparatus using a pre-patterned seed layer for providing an aligned coil for an inductive head structure. The method uses an aligned process where the base plate imprint is fabricated on an electrically insulating layer and the reversed image is fabricated and etched into the coil insulation material, e.g., hard bake photoresist to alleviate the problems associated with complete ion removal of the seed layer between high aspect ratio coils. The method would also not be prone to plating non-uniformities (voids), and would not be subject to seed layer undercutting in a wet etch step process.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Thomas Edward Dinan, Jeffrey S. Lille, Son Van Nguyen, Hugo Alberto Emilio Santini
  • Patent number: 7120595
    Abstract: A method and system for providing online comparison shopping are disclosed. The system provides online comparison shopping through a designated website accessible by a user via a communication network such as the Internet The method includes the steps of compiling a shopping list identifying specific items to be purchased, receiving optimization criteria specified by the user, optimizing, by the system, the shopping list based on the optimization criteria to produce an optimal shopping order, and displaying the optimal shopping order to the user if the optimal shopping order exists.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventor: Geoffrey D. Alexander
  • Patent number: 7120575
    Abstract: A digitized speech signal (600) is input to an F0 (fundamental frequency) processor that computes (610) a continuous F0 data from the speech signal. By the criterion voicing state transition (voiced/unvoiced transitions) the speech signal is presegmented (620) into segments. For each segment (630) it is evaluated (640) whether F0 is defined or not defined i.e. whether F0 is ON or OFF. In case of F0=OFF a candidate segment boundary is assumed as described above and, starting from that boundary, prosodic features are computed (650). The feature values are input into a classification tree and each candidate segment is classified thereby revealing, as a result, the existence or non-existence of a semantic or syntactic speech unit.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Martin Haase, Werner Kriechbaum, Gerhard Stenzel
  • Patent number: 7119578
    Abstract: A level converter for interfacing two circuits supplied by different supply voltages, and integrated circuit including the level converter interfacing circuit in two different voltage islands. A first buffer is supplied by a virtual supply and receives an input signal from a lower voltage circuit. The first buffer drives a second buffer, which is supplied by a higher supply voltage. An output from the second buffer switches a supply select to selectively pass the higher supply voltage or a reduced supply voltage to the first buffer.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corp.
    Inventors: Anthony Correale, Jr., Rajiv V. Joshi, David S. Kung, Zhigang Pan, Ruchir Puri
  • Patent number: 7118026
    Abstract: A system, such as a checkout station, for positively identifying items includes a reader that reads coded information affixed to an item. The system further includes a capture module, such as a camera. The capture module captures a visual characteristic of the item to be identified, such as the color, size, shape, or texture of the item. The visual characteristic of the item is compared with visual characteristics of candidate items stored within a database. If multiple items within the database are associated with the item to be identified, the images of the candidate items may be displayed to a user. The user may then select the candidate item that most resembles the item to be identified. The coded information of the item being identified is then compared with coded information of the selected item within the database. If the coded information of both items corresponds, the item is positively identified and is accepted for purchase by a consumer.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Richard Hunter Harris, Lawrence Arthur Heyl, Jonathan Hudson Connell, II, Hollis Phillip Posey
  • Patent number: 7120621
    Abstract: A system and method are described for constructing and implementing generic software agents for automated tuning of computer systems and applications. The framework defines the modules and interfaces to allow agents to be created in a modular fashion. The specifics of the target system are captured by adaptors that provide a uniform interface to the target system. Data in the agent is managed by a metric manager, and controller modules implement the desired control algorithms. The modular structure and common interfaces allow for the construction of generic agents that are applicable to a wide variety of target systems, and can use a wide variety of control algorithms.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Joseph Phillip Bigus, Joseph L. Hellerstein, Sujay Parekh, Jeffrey Robert Pilgrim, Donald A. Schlosnagle, Mark S. Squillante, Jayram S. Thathachar
  • Patent number: 7120888
    Abstract: A method for determining placement of circuitry during integrated circuit design. The method includes accessing a net list identifying circuitry connections. A plurality of individual net weights are assigned to nets in timing paths within the net list, the individual net weights being valid irrespective of physical design parameters. A composite net weight is determined for said timing paths, the composite net weight being in response to the plurality of individual net weights. Initial placement of the circuitry is determined in response to the composite net weight.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: James J. Curtin, Ray Raphy, Stephen Szulewski
  • Patent number: 7118986
    Abstract: Methods for forming or etching silicon trench isolation (STI) in a silicon-on-insulator (SOI) region and a bulk silicon region, and a semiconductor device so formed, are disclosed. The STI can be etched simultaneously in the SOI and bulk silicon regions by etching to an uppermost silicon layer using an STI mask, conducting a timed etch that etches to a desired depth in the bulk silicon region and stops on a buried insulator of the SOI region, and etching through the buried insulator of the SOI region. The buried insulator etch for this process can be done with little complexity as part of a hardmask removal step. Further, by choosing the same depth for both the bulk and SOI regions, problems with a subsequent CMP process are avoided. The invention also cleans up the boundary between the SOI and bulk regions where silicon nitride residuals may exist.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Michael D. Steigerwalt, Mahender Kumar, Herbert L. Ho, David M. Dobuzinsky, Johnathan E. Faltermeier, Denise Pendleton
  • Patent number: 7119745
    Abstract: Printed antenna devices are provided, which can operate at RF and microwave frequencies, for example, while simultaneously providing antenna performance characteristics such as high gain/directivity/radiation efficiency, high bandwidth, hemispherical radiation patterns, impedance, etc., that render the antennas suitable for voice communication, data communication or radar applications, for example. Further, apparatus are provided for integrally packaging such printed antenna devices with IC (integrated circuit) chips (e.g., transceiver) to construct IC packages for, e.g., wireless communications applications.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Brian Paul Gaucher, Duixian Liu, Ullrich Richard Rudolf Pfeiffer, Thomas Martin Zwick
  • Patent number: 7120759
    Abstract: A storage system and method for prestaging data in a cache based on relative changes in the frequency of data access and relative changes in the effectiveness of previous prestage operations. The relative changes in the frequency of data access are determined by storing statistics of data access to all regions in the system and comparing recent access statistics to the stored data. Access statistics include data location, I/O size and access frequency. The relative changes in the effectiveness of previous prestage operations are detected by recording the number of previous prestaging operations for a region, recording the number of I/O requests for data that has been prestaged, and dividing the number of I/O requests for previously prestaged data in a region during a time period by the number of previous prestage operations for the region during the same time.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Lawrence Yium-Chee Chiu, Archana Shyamsunder Samtani
  • Patent number: 7118274
    Abstract: A method and a reference circuit for bias current switching are provided for implementing an integrated temperature sensor. A first bias current is generated and constantly applied to a thermal sensing diode. A second bias current is provided to the thermal sensing diode by selectively switching a multiplied current from a current multiplier to the thermal sensing diode or to a load diode. The reference circuit includes a reference current source coupled to current mirror. The current mirror provides a first bias current to a thermal sensing diode. The current mirror is coupled to a current multiplier that provides a multiplied current. A second bias current to the thermal sensing diode includes the first bias current and the multiplied current from the current multiplier. The second bias current to the thermal sensing diode is provided by selectively switching the multiplied current between the thermal sensing diode and a dummy load diode.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Nghia Van Phan, Patrick Lee Rosno, James David Strom
  • Patent number: 7120826
    Abstract: A method, system and computer program product for performing an expansion of a disk array. Upon the failure of a disk in the disk array, the failed disk may be rebuilt stripe by stripe in the spare units distributed among other disks in the disk array. Upon repairing or replacing the failed disk with a spare disk, the repaired or spare disk may be rebuilt stripe by stripe using the data from the spare units. Upon receiving a write request to a stripe unit that has been rebuilt in the repaired or spare disk during expansion, the data of the request may be written in the stripe unit requested. Further, the data written may be mirrored, i.e., copied and stored, in the spare unit corresponding to the stripe unit requested. By mirroring the data to the corresponding spare unit, tracking each stripe that was updated during expansion may be eliminated.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Richard Christopher Fore, Vikram Harakere Krishnamurthy, Luis Rene Quinones
  • Patent number: 7120880
    Abstract: A system and method for unobtrusively detecting a subject's level of interest in media content, includes detecting to what a subject is attending, measuring a subject's relative arousal level; and combining information regarding the subject's arousal level and attention to infer a level of interest.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: D. Christopher Dryer, Myron Dale Flickner, Jianchang Mao
  • Patent number: 7119403
    Abstract: A semiconductor device and method of manufacture provide an n-channel field effect transistor (nFET) having a shallow trench isolation with overhangs that overhang Si—SiO2 interfaces in a direction parallel to the direction of current flow and in a direction transverse to current flow. The device and method also provide a p-channel field effect transistor (pFET) having a shallow trench isolation with an overhang that overhangs Si—SiO2 interfaces in a direction transverse to current flow. However, the shallow trench isolation for the pFET is devoid of overhangs, in the direction parallel to the direction of current flow.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Bruce B. Doris, Oleg G. Gluschenkov
  • Patent number: 7119016
    Abstract: A compound that includes at least Si, N and C in any combination, such as compounds of formula (R—NH)4-nSiXn wherein R is an alkyl group (which may be the same or different), n is 1, 2 or 3, and X is H or halogen (such as, e.g., bis-tertiary butyl amino silane (BTBAS)), may be mixed with silane or a silane derivative to produce a film. A polysilicon silicon film may be grown by mixing silane (SiH4) or a silane derviative and a compound including Si, N and C, such as BTBAS. Films controllably doped with carbon and/or nitrogen (such as layered films) may be grown by varying the reagents and conditions.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: October 10, 2006
    Assignees: International Business Machines Corporation, Applied Materials, Inc.
    Inventors: Ashima B. Chakravarti, Anita Madan, Woo-Hyeong Lee, Gregory Wayne Dibello, Ramaseshan Suryanarayanan Iyer
  • Patent number: 7120681
    Abstract: Methods and apparatus are provided for controlling the clustering of nodes which implement a cluster-based routing protocol in a data communications network system where the system comprises a plurality of such nodes which are interconnectable to form a plurality of ad hoc networks. For each node which is a member of a cluster, cluster control information (CCMs) is maintained, this cluster control information being dependent on the size of at least the cluster of which that node is a member. On connection of two nodes which are members of two respective clusters, each of the two nodes transmits its cluster control information to the other node, and then determines whether a clustering condition is satisfied. In each node, the clustering condition is dependent on the cluster control information maintained for that node and the cluster control information received from the other node. In each node, if the clustering condition is satisfied, the node then communicates a clustering agreement to the other node.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Laurent Frelechoux, Michael Osborne, Paolo Scotton, Ilias Iliadis
  • Patent number: 7119593
    Abstract: Circuitry for delaying a signal includes a phase-locked loop comprising one or more output nodes for outputting one or more output signals in response to a reference signal. A buffer is coupled to the output nodes of the phase-locked loop for receiving phase-locked loop output signals and outputs one or more buffered output signals. A multiplexing element receives the buffered output signals and a control signal and generates an operative buffered output signal in response to the control signal. A delay line receives a delay control input signal and the operative buffered output signal from the multiplexing element. The delay line outputs a delayed output signal in response to the delay control input signal.
    Type: Grant
    Filed: February 8, 2005
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Kevin C. Gower, Swati Sathaye
  • Patent number: 7118385
    Abstract: A self-aligning socket for an integrated circuit package includes an outer frame and an array of contacts configured for alignment with corresponding conductive pads on the bottom of the integrated circuit package. The outer frame further includes a first plurality of alignment ball bearings configured thereon, the ball bearings mounted on cantilevered spring rods.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Paul Bodenweber, David C. Long, Jason S. Miller, Robert P. Westerfield, Jr., Yuet-Ying Yu
  • Patent number: 7119416
    Abstract: The invention includes methods of fabricating a bipolar transistor that adds a silicon germanium (SiGe) layer or a third insulator layer of, e.g., high pressure oxide (HIPOX), atop an emitter cap adjacent the intrinsic base prior to forming a link-up layer. This addition allows for removal of the link-up layer using wet etch chemistries to remove the excess SiGe or third insulator layer formed atop the emitter cap without using oxidation. In this case, an oxide section (formed by deposition of an oxide or segregation of the above-mentioned HIPOX layer) and nitride spacer can be used to form the emitter-base isolation. The invention results in lower thermal cycle, lower stress levels, and more control over the emitter cap layer thickness, which are drawbacks of the first embodiment. The invention also includes the resulting bipolar transistor structure.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Thomas N. Adam, Kevin K. Chan, Alvin J. Joseph, Marwan H. Khater, Qizhi Liu, Beth Ann Rainey, Kathryn T. Schonenberg
  • Patent number: 7120650
    Abstract: In a cluster of computing nodes having shared access to one or more volumes of data storage using a parallel file system, a method for managing the data storage includes initiating a data management application in the cluster using a data management application programming interface (DMAPI) of the parallel file system. When a request submitted to the parallel file system is received on one of the nodes to perform an operation on a file in one of the volumes of data storage, a data management access right is obtained from the DMAPI responsive to the request The operation is performed on the file using the access right.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Irit Loy, John Marberg, Boaz Shmueli, Frank Schmuck, James Wyllie
  • Patent number: 7119587
    Abstract: The present invention provides for state correction. A first value in a state circuit is received from a flip flop. The received value is transmitted to a second flip flop. The received value within the second flip flop is altered if an error condition arises. The received value is transmitted to a third flip flop. In one aspect, the received value transmitted to the third flip flop comprises an unaltered received value. In another aspect, the received value transmitted to the third flip flop comprises transmitting an altered received value. This allows for an incorrect state within the state machine to change to a correct state after a few clock pulses.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: David William Boerstler, Eric John Lukes, Hiroki Kihara, James David Strom
  • Patent number: 7120697
    Abstract: Methods, systems and computer program products provide assignment of ports for connections originated by multiple application instances executing on different data processing systems utilizing a common network address. An indication of available ports for the common network address is provided to each of the different data processing systems executing the multiple application instances. A port identified as available is selected as a port for a connection utilizing the common network address.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: John Andrew Aiken, Jr., Wesley McMillan Devine, David Anthony Herr, Mark W. McClintock, Raymond E. Ward
  • Patent number: 7120628
    Abstract: A system, method, and computer readable medium for providing a system user with information updates from web-based or non-web-based computer sources. The system enables a user to subscribe from a computer application (e.g., an electronic mail or calendar application) to information sources. The system presents the user with a subscription view that the user may use to create the subscription through the use of selectable criteria displayed in the subscription view. The user may input search criteria for performing a search of one or more databases. The system searches the databases accessed, and then retrieves the objects matching the search criteria. The system may then notify the user that objects matching the search criteria have been discovered, and store or present the objects.
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Douglas Walter Conmy, Gail Elaine Strait, Damien Frederick Katz, Robert Shaver
  • Publication number: 20060224956
    Abstract: A method, system, and apparatus for intelligent document saving. An intelligent document saving method can include cropping a document to frame a changed portion of the document and saving only content framed by the cropping. Notably, the cropping step can include maintaining watermarks in the document to demarcate unchanged portions from both the start and the end of the document and, consequently, a starting and ending position in the document of the changed portion. The position of the watermarks can be repeatedly updated whenever changes are performed to the document.
    Type: Application
    Filed: April 5, 2005
    Publication date: October 5, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Adrian Storisteanu, Kushal Munir
  • Publication number: 20060225006
    Abstract: An apparatus and method for optimizing the size of an IO collar and reducing the die size of an IC chip is provided. The method and apparatus includes arranging rotated IO cells around the edges of the IC chip to reduce the number of unused IO cells in the IO collar. All the IO cells may be rotated, or a combination of rotated and non-rotated IO cells may form the IO collar. For each edge of the IC chip having rotated IO cells, each edge may have the same number of stacks of IO cells or a different number of stacks of IO cells.
    Type: Application
    Filed: April 4, 2005
    Publication date: October 5, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wai Chung-Maloney, Haruo Ito, Douglas Stout
  • Publication number: 20060224881
    Abstract: An apparatus and method are disclosed for managing component identifiers in a data storage system. The apparatus includes a recognition module, a receiving module, a comparison module, and an update module. The recognition module recognizes newly installed components. The receiving module receives a component identifier stored on the newly installed component. The comparison module compares the identifier of the newly installed component with one or more component identifiers stored in a computer system memory. The update module updates the one or more component identifiers stored in the system memory based upon the identifier of the newly installed component.
    Type: Application
    Filed: March 9, 2005
    Publication date: October 5, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy Pierce, Brian Goodman, Justin Hom, Leonard Jesionowski
  • Publication number: 20060220112
    Abstract: Methods and structure formed for retarding diffusion of a dopant into a channel of a strained Si—SiGe CMOS device are disclosed. The methods form a diffusion retardant region in a substrate including at least one diffusion retardant species such as xenon (Xe), and then form a channel layer over the diffusion retardant region. Each step is conducted prior to formation of a gate on the substrate. As a result, if necessary, the diffusion retardant region can be annealed and cleaned or etched to remove defects in the substrate to reduce external resistance and leakage of devices. The diffusion retardant region positioned under the channel slows down the diffusion of a dopant, e.g., arsenic (As). The invention is also applicable to other substrates.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Huilong Zhu, Kam-Leung Lee, Jinghong Li, Anda Mocuta
  • Publication number: 20060225042
    Abstract: A method, system and apparatus for applying virtual threads in debugging a business process program. In accordance with the present invention, different activities in a business process can be associated with corresponding virtual thread identifiers where groups of the activities related to one another through corresponding links can be assigned a single virtual thread identifier. Based upon the association of activities with corresponding virtual thread identifiers, a directed graph of different activities of different virtual thread identifiers can be generated. Accordingly, debug operations including applying breakpoints, step over debugging and the like can be applied to a business process program regardless of the host platform for any one activity in the business process program.
    Type: Application
    Filed: April 5, 2005
    Publication date: October 5, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan Bennett, William O'Farrell
  • Publication number: 20060221537
    Abstract: An apparatus (and method for operating the same) which allows tightly coupling the device wafer to the electrostatic chuck of the process chamber after the process chamber is conditioned. The method comprises (a) providing (i) a process chamber and (ii) an electrostatic chuck in the process chamber; (b) placing a guard wafer on the electrostatic chuck via a top surface of the electrostatic chuck; and (c) forming a particle restraining layer on essentially all surfaces that are exposed to the ambient inside the process chamber, wherein the particle restraining layer has a thickness in a first direction of at least 500 ?, wherein the first direction is essentially perpendicular to an interfacing surface between the particle restraining layer and an inner surface of the process chamber, and wherein the guard wafer comprises a material selected from the group consisting of a metal and a semiconductor oxide.
    Type: Application
    Filed: April 4, 2005
    Publication date: October 5, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Scott Hargash, Pavel Smetana
  • Publication number: 20060225005
    Abstract: Methods, systems and program products are disclosed that prioritize each target via for via redundancy based on at least one of the following: subnet timing information, a distance of a target via along a path from a driving source and a target via net/subnet characteristic, and attempt to add a redundant via to each target via based on the prioritization. The invention improves overall yield and reduces timing sensitivity to AC-related defects.
    Type: Application
    Filed: April 4, 2005
    Publication date: October 5, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony Correale, Lewis Dewey, Jason Hibbeler
  • Publication number: 20060220688
    Abstract: The present invention comprises a method and structure for programming an on-chip phase-change resistor to a target resistance. Using an off-chip precision resistor as a reference, a state-machine determines a difference between the resistance of an on-chip resistor and the target resistance. Based upon this difference, the state machine directs a pulse generator to apply set or reset pulses to the on-chip resistor in order to decrease or increase, respectively, the resistance of the resistor, as necessary. In order to program the resistance of the phase-change resistor to a tight tolerance, it is successively reset and set by applying progressively decreasing numbers of reset pulses and set pulses, respectively, until the number of set pulses is equal to one and the target resistance of the on-chip resistor is reached.
    Type: Application
    Filed: April 4, 2005
    Publication date: October 5, 2006
    Applicant: International Business Machines Corporation
    Inventors: Louis Hsu, Brian Ji, Chung Lam
  • Publication number: 20060224689
    Abstract: Methods, systems, and computer program products for providing customized content over a network are provided. The method includes associating content with at least one of a domain name, group, and geography for an entity, the content relating to at least one of the domain name, group, and geography. For each entity, the method also includes storing results of the association in a database record that is mapped to a domain name. In response to receiving a request to access a resource by the entity, the method further includes obtaining a domain name of the entity utilizing address information provided in the request, searching a database for the domain name of the entity, retrieving the database record corresponding to the domain name, generating a resource that includes the content, and providing the entity with the resource.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Applicant: International Business Machines Corporation
    Inventors: David Leip, Kapil Gupta, Klaus Rusch, Matthew Ganis, Santiago Rozas
  • Publication number: 20060220148
    Abstract: A method and structure for forming a semiconductor structure. A semiconductor substrate is provided. A trench is formed within the semiconductor substrate. A first layer of electrically insulative material is formed within the trench. A first portion and a second portion of the first layer of electrically insulative material is removed. A second layer of electrically insulative material is selectively grown on the first layer comprising the removed first portion and the removed second portion.
    Type: Application
    Filed: June 2, 2006
    Publication date: October 5, 2006
    Applicant: International Business Machines Corporation
    Inventors: Toshiharu Furukawa, Mark Hakey, Steven Holmes, David Horak, Charles Koburger
  • Publication number: 20060224562
    Abstract: Techniques for similarity searching are provided. In one aspect, a method of searching structural data in a database against one or more structural queries comprises the following steps. A desired minimum degree of similarity between the one or more queries and the structural data in the database is first specified. One or more indices are then used to exclude from consideration any structural data in the database that does not share the minimum degree of similarity with one or more of the queries.
    Type: Application
    Filed: March 31, 2005
    Publication date: October 5, 2006
    Applicant: International Business Machines Corporation
    Inventors: Xifeng Yan, Philip Yu
  • Publication number: 20060224304
    Abstract: The present invention provides a method, system and computer program product for routing multiple paths through polygonal obstacles. In a preferred embodiment, the method begins by offsetting the initial paths through the obstacles from the obstacles to form adjusted paths. If it is determined that any adjusted path encounters a new intersection, the adjusted path or paths are modified to form revised paths. The vertices of each obstacle are labeled. All the revised and all the adjusted paths are sorted. Then, according to their sorted order, the revised and the adjusted paths are reconstructed to form offset paths.
    Type: Application
    Filed: March 29, 2005
    Publication date: October 5, 2006
    Applicant: International Business Machines Corporation
    Inventors: Thomas Randall Hudson, Michael Whitney Sorenson
  • Publication number: 20060225023
    Abstract: An integrated circuit, a method and a system for designing and a method fabricating the integrated circuit. The method including: (a) generating a photomask level design of an integrated circuit design of the integrated circuit, the photomask level design comprising a multiplicity of integrated circuit element shapes; (b) designating regions of the photomask level design between adjacent integrated circuit element shapes, the designated regions large enough to require placement of fill shapes between the adjacent integrated circuit elements based on fill shape rules, the fill shapes not required for the operation of the integrated circuit; and (c) placing one or more monitor structure shapes of a monitor structure in at least one of the designated regions, the monitor structure not required for the operation of the integrated circuit.
    Type: Application
    Filed: April 4, 2005
    Publication date: October 5, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James Adkisson, Greg Bazan, John Cohn, Matthew Grady, Thomas Sopchak, David Vallett
  • Publication number: 20060224835
    Abstract: A system and method for supporting cache coherency in a computing environment having multiple processing units, each unit having an associated cache memory system operatively coupled therewith. The system includes a plurality of interconnected snoop filter units, each snoop filter unit corresponding to and in communication with a respective processing unit, with each snoop filter unit comprising a plurality of devices for receiving asynchronous snoop requests from respective memory writing sources in the computing environment; and a point-to-point interconnect comprising communication links for directly connecting memory writing sources to corresponding receiving devices; and, a plurality of parallel operating filter devices coupled in one-to-one correspondence with each receiving device for processing snoop requests received thereat and one of forwarding requests or preventing forwarding of requests to its associated processing unit.
    Type: Application
    Filed: March 29, 2005
    Publication date: October 5, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthias Blumrich, Dong Chen, Alan Gara, Mark Giampapa, Philip Heidelberger, Dirk Hoenicke, Martin Ohmacht, Valentina Salapura, Pavlos Vranas