IBM Patents

The International Business Machines Corporation provides IT infrastructure and services to enterprise customers.

IBM Patents by Type
  • IBM Patents Granted: IBM patents that have been granted by the United States Patent and Trademark Office (USPTO).
  • IBM Patent Applications: IBM patent applications that are pending before the United States Patent and Trademark Office (USPTO).
  • Publication number: 20050186007
    Abstract: A duplex check printer includes an upper document path, a print head at one side of the upper document path, and a lower document path having a loop to invert a check so that information can be printed on both sides of the check. The check is driven within the upper document path by feed rolls, which are reversed when the check is driven from the upper document path to the lower document path. The check is driven within the lower document path by belts, which are in turn driven by a separate motor.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Richard Harris, Robert Myers, Jeff Thomas
  • Publication number: 20050186686
    Abstract: A magnetic data track used in a magnetic shift register memory system may be fabricated by forming a multilayered stack of alternating dielectric and/or silicon layers. Vias of approximately 10 microns tall with a cross-section on the order of 100 nm×100 nm are etched in this multilayered stack of alternating layers. Vias may be etched form smooth or notched walls. Vias are filled by electroplating layers of alternating types of ferromagnetic or ferrimagnetic metals. The alternating ferromagnetic or ferrimagnetic layers are comprised of magnetic materials with different magnetization or magnetic exchange or magnetic anisotropies. These different magnetic characteristics allow the pinning of magnetic domain walls at the boundaries between these layers. Alternatively, vias are filled with a homogeneous ferromagnetic material. Magnetic domain walls are formed by the discontinuity in the ferromagnetic or ferromagnetic material that occurs at the notches or at the protuberances along the via walls.
    Type: Application
    Filed: February 25, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Tze-chiang Chen, Stuart Parkin
  • Publication number: 20050185159
    Abstract: An efficient method and system is provided for computing lithographic images that takes into account vector effects such as lens birefringence, resist stack effects and tailored source polarizations, and may also include blur effects of the mask and the resist. These effects are included by forming a generalized bilinear kernel, which is independent of the mask transmission function, which can then be treated using a decomposition to allow rapid computation of an image that includes such non-scalar effects. Dominant eigenfunctions of the generalized bilinear kernel can be used to pre-compute convolutions with possible polygon sectors. A mask transmission function can then be decomposed into polygon sectors, and weighted pre-images may be formed from a coherent sum of the pre-computed convolutions for the appropriate mask polygon sectors. The image at a point may be formed from the incoherent sum of the weighted pre-images over all of the dominant eigenfunctions of the generalized bilinear kernel.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Alan Rosenbluth, Gregg Gallatin, Ronald Gordon, Nakgeuon Seong, Alexey Lvov, William Hinsberg, John Hoffnagle, Frances Houle, Martha Sanchez
  • Publication number: 20050188075
    Abstract: A server allocation controller provides an improved distributed data processing system for facilitating dynamic allocation of computing resources. The server allocation controller supports transaction and parallel services across multiple data centers enabling dynamic allocation of computing resources based on the current workload and service level agreements. The server allocation controller provides a method for dynamic re-partitioning of the workload to handle workload surges. Computing resources are dynamically assigned among transaction and parallel application classes, based on the current and predicted workload. Based on a service level agreement, the server allocation controller monitors and predicts the load on the system. If the current or predicted load cannot be handled with the current system configuration the server allocation controller determines additional resources needed to handle the current or predicted workload. The server cluster is reconfigured to meet the service level agreement.
    Type: Application
    Filed: January 22, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Daniel Dias, Edwin Lassettre, Avraham Leff, Marcos Novaes, James Rayfield, Noshir Wadia, Peng Ye
  • Publication number: 20050188289
    Abstract: Disclosed is a method and apparatus for autonomously self-monitoring and self-adjusting the operation of an integrated circuit device throughout the integrated circuit device's useful life. The invention periodically performs performance self-testing on the integrated circuit device throughout the integrated circuit devices useful life. The invention also evaluates whether results from the self-testing are within acceptable limits and self-adjusts parameters of the integrated circuit device until the results from the self-testing are within the acceptable limits.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 25, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Zachary Berndlmaier, Stephen Geissler, William Tonti
  • Publication number: 20050184354
    Abstract: The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 25, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jack Chu, Gabriel Dehlinger, Alfred Grill, Steven Koester, Qiging Ouyang, Jeremy Schaub
  • Publication number: 20050188230
    Abstract: A method and apparatus for adaptively adjusting the operating voltage of an integrated circuit in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations, or reliability wearout mechanisms. The minimum operating voltage of an integrated circuit is determined either during external testing of the integrated circuit or during built-in-self-testing. The minimum operating voltage is transmitted to a variable voltage regulator where it is used to set the output of the regulator. The output of the regulator supplies the integrated circuit with its operating voltage. This technique enables tailoring of the operating voltage of integrated circuits on a part-by-part basis which results in power consumption optimization by adapting operating voltage in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations or reliability wearout mechanisms.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 25, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Mark Bilak
  • Publication number: 20050183603
    Abstract: A method and system for a printing device is disclosed. The method and system comprise printing a test pattern on a print medium and generating a digital image of the printed test pattern by an imaging device. The method and system include analyzing an interference pattern to measure for distortion of the print medium and calibrating the printing device based upon the measured distortion. In a preferred embodiment, the present invention utilizes the reticle patterns, which are printed in the margins of the paper, which are measured real-time during printing. The interference or Moiré patterns created by superimposed reticles may be used to measure image distortion, process direction misalignment, and misregistration caused by web distortion.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Jennifer Trelewicz, Joan Mitchell, Arthur Ford, Carl Bildstein, Timothy Bradley
  • Publication number: 20050188290
    Abstract: A method (and structure) of at least one of testing, diagnosing, and monitoring an operation of an electronic circuit, includes interrupting a clock signal used to provide a clocking for a normal operation of the circuit and using a second clock signal to repeatedly cycle through a predetermined cycle of operations for the circuit.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Franco Motika, Peilin Song
  • Publication number: 20050188024
    Abstract: A system, method and computer program product are provided for identifying spoofed emails. According to the method, an email addressed to a recipient in a first network is received, with the email including a plurality of headers, and at least one of the plurality of headers including a sender address. It is determined whether the sender address indicates a mailbox from within the first network, and the sender address is modified if it indicates a mailbox within the first network. The email with the modified sender address is sent to the recipient. In one embodiment, a second email is received that is from the recipient and that is addressed to the modified sender address, the modified sender address is modified so as to return it to its original form, and the second email is sent.
    Type: Application
    Filed: January 9, 2004
    Publication date: August 25, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: David Singer
  • Publication number: 20050187368
    Abstract: Data validation techniques are provided. For example, such techniques complement user entries associated with events of interest through context. In one aspect of the invention, a technique for processing one or more user entries associated with one or more events of interest includes the following steps/operations. Context associated with the one or more events of interest is obtained. At least a portion of the obtained context is associated with one or more user entries representing events of interest. At least a portion of the one or more user entries is evaluated, responsive to at least a portion of the context. An indication of the one or more events of interest is provided, responsive to the evaluation.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Maria Ebling, Edith Stern, Pnina Vortman
  • Publication number: 20050184359
    Abstract: A bipolar transistor is provided which includes a tapered, i.e. frustum-shaped, collector pedestal having an upper substantially planar surface, a lower surface, and a slanted sidewall extending between the upper surface and the lower surface, the upper surface having substantially less area than the lower surface. The bipolar transistor further includes an intrinsic base overlying the upper surface of the collector pedestal, a raised extrinsic base conductively connected to the intrinsic base and an emitter overlying the intrinsic base. In a particular embodiment, the emitter is self-aligned to the collector pedestal, having a centerline which is aligned to the centerline of the collector pedestal.
    Type: Application
    Filed: February 25, 2004
    Publication date: August 25, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hiroyuki Akatsu, Rama Divakaruni, Gregory Freeman, David Greenberg, Marwan Khater, William Tonti
  • Publication number: 20050185458
    Abstract: Techniques for attaining high performance magnetic memory devices are provided. In one aspect, a magnetic memory device comprising one or more free magnetic layers is provided. The one or more free magnetic layers comprise a low magnetization material adapted to have a saturation magnetization of less than or equal to about 600 electromagnetic units per cubic centimeter. The device may be configured such that a ratio of mean switching field associated with an array of non-interacting magnetic memory devices and a standard deviation of the switching field is greater than or equal to about 20. The magnetic memory device may comprise a magnetic random access memory (MRAM) device. A method of producing a magnetic memory device is also provided.
    Type: Application
    Filed: April 19, 2005
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventor: David Abraham
  • Publication number: 20050188287
    Abstract: A method of testing and repairing an integrated circuit having a total number of fuses for effecting repair of the integrated circuit. The method including: testing a memory array with a set of tests and reserving a first number of the total number of fuses for use in repairing the memory array based on results of the first set of tests; and shmoo testing the memory array by incrementing, decrementing or incrementing and decrementing values of a test parameter until a minimum or maximum value of the test parameter is reached that utilizes a second number of the total number of fuses for use in repairing the memory array to operate at the minimum or maximum value of the test parameter.
    Type: Application
    Filed: February 25, 2004
    Publication date: August 25, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael Combs, Dale Grosch, Toshiharu Saitoh, Guy Vanzo
  • Publication number: 20050188321
    Abstract: A method (and structure) of providing a composite data feed for an online meeting includes at least one of providing a capability for at least one participant node in the online meeting to input a layout rule for a customized composite image of the online meeting and receiving a layout rule defining a composite image of the online meeting that can be customized for at least one participant node in the online meeting.
    Type: Application
    Filed: February 25, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Samuel Adams, Peter Malkin, Jeremy Sussman
  • Publication number: 20050188071
    Abstract: An example of a solution provided here comprises: providing a logical design, including at least one hub containing central management tools, and a plurality of lower tiers containing local management tools; placing components according to the design; and providing, from the hub, one or more management functions. The lower tiers include one or more elements chosen from RIM's, spokes, and POD's.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Rhonda Childress, Kenneth Christiance, David Kumhyr, Michael Lamb, Gregg Machovec, Neil Pennell
  • Publication number: 20050187753
    Abstract: Methods and apparatus are provided for assisting a user who is editing a markup document on a computer. The user is presented with the markup document on a display of the computer for editing and provided with grammatical assistance based on a grammar inferred from current content of the markup document. The grammar may be inferred and updated automatically after the markup document is loaded or edited. The assistance provided may be based on a combination of an inferred grammar and a real grammar. The markup document can be an extensible markup language (XML) document.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 25, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Craig Salter
  • Publication number: 20050185046
    Abstract: The present invention is a method for locating an asset in a facility. An example of an asset is a vehicle and an example of a facility is a parking facility. When the user enters the facility with the asset, the user receives a base and code from a base/code booth. The code may be stored on a removable card. The user secures the asset by entering the code. While the user is away from the facility, the present invention monitors the base for movement detected by the motion sensor. When the user returns to the facility, a locator panel displays the location of the asset. The present invention determines the location of the asset by triangulation using the locators. The user then returns to the asset, deactivates the motion sensor, returns the base and code to a base/code booth, pays for the storage services, and exits the facility.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Yen-Fu Chen, Randolph Forlenza, John Kaemmerer, Raghuraman Kalyanaraman
  • Publication number: 20050188129
    Abstract: A method, computer program product and system for facilitating inter-digital signal processing (DSP) data communications. A direct memory access (DMA) controller may be configured to facilitate transfers of data between a first and a second DSP processor core coupled to the DMA controller. The DMA controller may read a data structure, referred to as a “buffer descriptor block,” to perform the data transfer. The buffer descriptor block may store both a source address and a destination address indicating where the data is to be retrieved and stored. The buffer descriptor block may further store a value, e.g., number of bytes, indicating a size of the data to be transferred. The DMA controller may then transfer the data located at the source address in the first DSP processor core, with a size, e.g., number of bytes, indicated from the buffer descriptor block, to the destination address in the second DSP processor core.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Youseff Abdelilah, Bartholomew Blaner, Gordon Davis, Jeffrey Derby, Joseph Garvey, Malcolm Ware, Hua Ye
  • Publication number: 20050188337
    Abstract: A design verification system includes a first verification engine to model the operation of a first design of an integrated circuit to obtain verification results including the model's adherence to a property during N time steps of its operation, proofs that one or more verification targets can be reached, and verification coverage results for targets that are not reached. A correspondence engine determines the functional correspondence between the first design and a second design of the integrated circuit. Functional correspondence, if demonstrated, enables reuse of the first engine's verification results to reduce resources expended during subsequent analysis of the second design. The correspondence determination may be simplified using a composite model of the integrated circuit having “implies” logic in lieu of “EXOR” logic. The implies logic indicates conditions in which a node in the second design achieves a state that is contrary to the verification results for the first design.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Jason Baumgartner, Robert Kanzelman, Hari Mony, Viresh Paruthi
  • Publication number: 20050188023
    Abstract: A method, apparatus, and computer instructions for managing unwanted email messages in a data processing system. An interface is provided for a user to select members of a reviewing group of users. Input is collected from each member of the reviewing group of users as to whether a particular email message is an unwanted email message. A filter is constructed from a collective input of the reviewing group of users for a user. The filter contains input from a set of users of the reviewing group of users, wherein the set of users is selected by the user. Incoming email messages are filtered using the filter. A selected email message identified by one member in the reviewing group of users is unforwarded to the user.
    Type: Application
    Filed: January 8, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Christopher Doan, Liliana Orozco
  • Publication number: 20050185823
    Abstract: A system and method for generating a viewable video index for low bandwidth applications are provided. The exemplary aspects of the present invention solve the problems with the prior art systems by incorporating information for generating a viewable representation of the video data into the index, thus generating a viewable video index. The viewable video index contains information for generating a visual representation of moving objects in the video data, a visual representation of the background of the video capture area, i.e. the scene, a representation of the object trajectory, a representation of the object attributes, and a representation of detected events. The result is that the viewable video index may be transmitted to a low bandwidth application on a client device and may be used along with associated object and background models to generate a representation of the actual video data without requiring that the original video data itself be streamed to the client device.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Lisa Brown, Jonathan Connell, Raymond Cooke, Arun Hampapur, Sharathchandra Pankanti, Andrew Senior, Ying-Li Tian
  • Publication number: 20050184720
    Abstract: A method and system for predicting gate reliability. The method comprises the steps of stressing a gate dielectric test site to obtain gate dielectric test site data and using the test site data to predict gate reliability. Preferably, the test structure and the product structure are integrated in such a manner that a test site occupies some of the product area and the product itself occupies the remainder of the product area.
    Type: Application
    Filed: March 24, 2005
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Kerry Bernstein, Ronald Bolam, Edward Nowak, Alvin Strong, Jody Van Horn, Ernest Wu
  • Publication number: 20050187931
    Abstract: A self-organizing personal file system is disclosed that evaluates the “importance” of terms and phrases in a document in a personal corpus relative to usage in a reference corpus. A personalized term weighting scheme assigns a weight to terms or phrases based on the frequency of occurrence of the corresponding term or phrase in a reference corpus. The personalized term weighting for a given term or phrase can be used to store and access documents containing the corresponding term or phrase in the spatial file system and provides coordinates in a spatial file system, for one or more documents containing the corresponding term or phrase. The location of a given document in a file space may be specified by the relative frequency distribution of the stems of its significant terms or phrases compared to the occurrence of such terms or phrases in a reference corpus.
    Type: Application
    Filed: April 25, 2005
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Thomas Cofino, Jonathan Lenchner
  • Publication number: 20050188241
    Abstract: A plurality of data packets encoded according to a first protocol are received which encapsulate data encoded according to a second protocol. A first source address is extracted from the packets according to the first protocol, it is determined whether or not the first source address is a substantial duplicate of a known assigned address. If it is a duplicate, a second source address is extracted from the encapsulated data according to the second protocol, and the first source address and said second source address are provided in an enhanced error log so that a system administrator may correct the duplicate assigned address. Enhanced embodiments of the invention included analysis of data encapsulated by a third, fourth and subsequent protocols, and automatic determination of each protocol encoding format.
    Type: Application
    Filed: January 16, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Rafael Cabezas, Anh Dang, Binh Hua, Jason Moore, Elizabeth Silvia
  • Publication number: 20050188420
    Abstract: A Centralized Authentication & Authorization (CAA) system that facilitates secure communication between service clients and service providers. CAA comprises a Service Request Filter (SRF), a Service Client Authentication Program (SCAP), a Service Authorization Program (SAP), and an Authorization Database (ADB). The SRF intercepts service requests, extracts the service client's identifier from a digital certificate attached to the request, and stores the identifier in memory accessible to service providers. In the preferred embodiment, the SRF forwards the service request to a web service manager. The web service manager invokes SCAP. SCAP matches the identifier with a record stored in ADB. SAP queries ADB to determine if the service request is valid for the service client. If the service request is valid, SAP authorizes the service request and the appropriate service provider processes the service request.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Messaoud Benantar, Yen-Fu Chen, John Dunsmoir, Randolph Forlenza, Wei Liu, Sandra Schlosser
  • Publication number: 20050188171
    Abstract: A method, apparatus, and computer instructions for processing instructions by a processing unit. An instruction set is dynamically set for the processing unit using a selected instruction map. The selected instruction map is selected as one being different from a normal instruction map for the processing unit. The instructions are processed at the processor using the instruction set. A set of authorized instructions are encoded using the selected instruction map.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventor: Gordon McIntosh
  • Publication number: 20050188176
    Abstract: A mechanism for generating pre-translated segments for use in virtual to real address translation is provided in which segments that are determined to meet a density threshold are promoted to a pre-translated segment class. The pages of these segments are moved to a contiguous portion of memory and the segment table entry corresponding to the segment is updated to indicate the segment to be a pre-translated segment and to include the base real address for the contiguous portion of memory. In one embodiment, as each page is moved, its page table entry is updated to point to the new location of the page so that the page is still accessible during promotion of the segment to a pre-translated segment. In this way, virtual-to-real address translation may be performed by concatenating the segment base real address, the page identifier, and a byte offset into the page.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Men-Chow Chiang, Sujatha Kashyap
  • Publication number: 20050187819
    Abstract: Data describing advertisements displayed within a shopping cart is used within a store computer, system along with data from a process, such as barcode scanning, identifying items selected for purchase during the use of the shipping cart. The data identifying the selected items is compared with data identifying the items that have been advertised within the cart of identifying a manufacturer, supplier, or brand name that has been advertised to determine the effectiveness of the advertising and to establish an amount of money owed for displaying the advertising.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventor: Michael Johnson
  • Publication number: 20050188251
    Abstract: A system and method for controlling peer-to-peer remote copy (PPRC) operations initiated from one or more host devices that desire to store data contents written to a first storage system to a second storage system over a communications link. The system enables receipt and generation of copy services commands from host devices and the determination of whether a received command pertains to a copy service over an established PPRC relationship for that particular customer to enable that customer to perform storage operations effecting data written to a first storage server having source volumes and stored in a remote second storage system having target volumes. The copy services command effecting data contents of source volumes and/or remote target volumes will be enabled if it is determined that said PPRC relationship is already established for that customer; and, prevented if the received copy services command does effect any volume not already in a copy services relationship.
    Type: Application
    Filed: January 9, 2004
    Publication date: August 25, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael Benhase, William Micka
  • Publication number: 20050188379
    Abstract: A method for processing a multidimensional array object in which a multidimensional array is implemented by an array of array objects. The multidimensional array object comprises array objects which constitute the multidimensional array. Flags representing that it is possible to optimize a process for elements of the multidimensional array object are added as additional information. The flags are stored in a storage device (main memory for instance). Then, a machine code corresponding to a state of the flags is executed.
    Type: Application
    Filed: April 28, 2005
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Tatsushi Inagaki, Hideaki Komatsu, Akira Koseki
  • Publication number: 20050183872
    Abstract: Methods, systems, and media to mount one or more components to a hardware casing are disclosed. Embodiments include hardware and/or software for determining a pattern of interconnects to apply to an interior surface of the hardware casing. The pattern includes at least one independent path for transmitting a signal between the components. The pattern of interconnects is then applied to the interior surface, the application being configured for the topography of the interior surface to couple the components with the pattern of interconnects. In many embodiments, the components may then be mounted to the casing and interconnected with the interconnects. And, in some embodiment, the pattern of interconnects may be coupled with a circuit board having additional components.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Michael Kaply, Walter Lee, Jonas Sicking, Lloyd Stearn
  • Publication number: 20050185436
    Abstract: A structure, apparatus and method for reducing the power requirement of CAM memories, where the memory cells of the memory array are divided into groups of rows of multiple memory segments. Each memory segment has its own search driver and is searched separately. The memory segments are also searched in a prescribed order. If the search data is found in a particular memory segment, the search is stopped, leaving subsequent memory segments unsearched. By searching memory segments only until the search data is found, match lines of the subsequent memory segments are not unnecessarily discharge and recharged thereby reducing the current demands placed upon the power supply by the CAM memory. A selectable option to do a full search of the CAM memory is also provided for when the power supply is able to meet such current demands.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 25, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: George Braceras, Robert Busch
  • Publication number: 20050188292
    Abstract: An error correction code for encoding the presence of a special uncorrectable error as well as its type. In the encoder, modification logic modifies the regular data symbols to indicate the type of special uncorrectable error. The encoder appends to the regular data symbols a special uncorrectable error symbol indicating the presence of a special uncorrectable error to form an extended data word, which is encoded to generate a code word. In the decoder, a syndrome generator generates a syndrome vector using an assumed value for the special uncorrectable error symbol indicating the absence of a special uncorrectable error, while a syndrome decoder determines the presence of the special uncorrectable error by determining the presence of an error in the assumed value of the special uncorrectable error symbol. By so using its error detection logic, the decoder makes it unnecessary to actually store or transmit the special uncorrectable error symbol.
    Type: Application
    Filed: December 23, 2003
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventor: Chin-Long Chen
  • Publication number: 20050188285
    Abstract: An example of a solution provided here comprises: under control of a base level, detecting an error in a production environment; and providing data about the error to a meta level; under control of the meta level, analyzing the data, using knowledge of base-level computational components; choosing a solution for the error; and implementing the solution at the base level.
    Type: Application
    Filed: January 13, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Craig Fellenstein, Carl Gusler, Rick Hamilton, Mamdouh Ibrahim
  • Publication number: 20050188088
    Abstract: A method, system, and program for managing escalating resource needs within a grid environment are provided. A job is submitted into a first selection of resources in a grid environment from among a hierarchy of discrete sets of resources accessible in the grid environment. Discrete sets of resources may include locally accessible resources, enterprise accessible resources, capacity on demand resources, and grid resources. The performance of the first selection of resources is monitored and compared with a required performance level for the job. If the required performance level is not met, then the discrete sets of resources are queried for available resources to meet the required performance level in an order designated by said hierarchy. Available resources in a next discrete set of resource from the hierarchy of discrete sets of resources are added to a virtual organization of resources handling the job within the grid environment.
    Type: Application
    Filed: January 13, 2004
    Publication date: August 25, 2005
    Applicant: International Business Machines Corporation
    Inventors: Craig Fellenstein, Rick Hamilton, Joshy Joseph, James Seaman
  • Patent number: 6934875
    Abstract: The present invention provides a method, system and apparatus by which TCP connections may be failed-over from one system to another within a highly available network service, and appear transparent to the remote client. The connection state and ownership information of a system is broadcast within the network, so that if a first system crashes while running an application, a predetermined take-over policy causes a peer system to assume connection without loss of data such that a permanent connection has been established from the client's point of view. After the failed system has been restored to a normal state, new connections are established by the first system. A connection cache device stores connection information for use during the failover.
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventor: Vivek Kashyap
  • Patent number: 6934908
    Abstract: Methods, systems, and computer program products for improving globalization of document content. A globalization model is defined which enables separating and externalizing translation-sensitive resources. A content translation expert can then operate efficiently to provide translated content, and a content designer can more easily focus on the task at hand using a resource-neutral document format. Using the disclosed techniques, translation-sensitive resources identified in a structured document can be programmatically translated by resolving references to a particular supplemental document in which the translated content for a target language has been specified.
    Type: Grant
    Filed: October 17, 2001
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: James E. Fox, Robert C. Leah, Erich S. Magee, John A. Scott, Robert C. Sizemore
  • Patent number: 6933186
    Abstract: A method of improving the tolerance of a back-end-of-the-line (BEOL) thin film resistor is provided. Specifically, the method of the present invention includes an anodization step which is capable of converting a portion of base resistor film into an anodized region. The anodized resistor thus formed has a sheet resistivity that is higher than that of the base resistor film.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: John M. Cotte, Kenneth J. Stein, Seshadri Subbanna, Richard P. Volant
  • Patent number: 6934799
    Abstract: This invention describes methods, apparatus and systems for virtualization of iSCSI storage. Virtual storage isolates the clients from the management of physical storage resources. In this invention, each physical storage device supports multiple logical units (LUNs). Each supported LUN is associated with a separate TCP port number and iSCSI commands received on a given port implicitly refer to the associated LUN. An iSCSI host addresses each logical unit of storage (LUN) with a virtual IP address and port number. Using an address translation table, the virtualization gateway rewrites the destination IP address in the header of an incoming packet as well as the destination port number to correspond to the target physical LUN. Migration of logical units across physical storage devices is supported by changing the address translation entries at the gateway; and the gateway can be provided by a standard network router with support for address translation.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: Arup Acharya, Khalil S. Amiri
  • Patent number: 6932617
    Abstract: A backplane system allowing a very large number of interconnections between high-connectivity printed circuit boards and a backplane is disclosed. The backplane is fragmented into a plurality of backplane parts that comprise connectors on their edges to mate connectors arranged on the high-connectivity printed circuit boards. These backplane parts may also include other connectors on their edges to couple to extension printed circuit boards requiring less interconnections or cables. Interposers can be used to link several backplane parts and provide enhanced air circulation.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: Pierre Debord, Rene Glaise, Claude Gomez
  • Patent number: 6934734
    Abstract: A method, apparatus, and computer implemented instructions for presenting changes to data are provided. User input is received through a first program in a first instance of a browser. The user input is placed in a variable. The user input is retrieved from the variable through a second program. The user input is processed by the second program to form a result. The result is presented in a second instance of the browser.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventor: Mansoor Abdulali Lakhdhir
  • Patent number: 6934723
    Abstract: A method and system are provided for replicating data in a network to a plurality of client applications which are associated to at least one server. Network traffic is reduced and an easy-to-do automated data replication is achieved basically by monitoring and storing modification information on server data exploiting XDSM capabilities in order to generate replication data for a subsequent distribution to the clients and by broadcasting said replication data from said server system to said client systems. Further, the replication data can advantageously be streamed to the clients through the network.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: Gerd Breiter, Thomas Raith
  • Patent number: 6933183
    Abstract: A selfaligned FinFET is fabricated by defining a set of fins in a semiconductor wafer, depositing gate material over the fins, defining a gate hardmask having a thickness sufficient to withstand later etching steps, etching the gates material outside the hardmask to form the gate, depositing a conformal layer of insulator over the gate and the fins, etching the insulator anistotropically until the insulator over the fins is removed down to the substrate, the hardmask having a thickness such that a portion of the hardmask remains over the gate and sidewalls remain on the gate, and forming source and drain areas in the exposed fins while the gate is protected by the hardmask material.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: Jochen C. Beintner, Edward J. Nowak
  • Patent number: 6934939
    Abstract: A method is disclosed for instructing a computing system to unwind a program call stack that lacks explicit Stack Frame Backchain Pointers, including finding the called function's entry point, determining the return point in the calling function, placing a NOP instruction at the return point that contains embedded information about what type of call was used, and backing up in storage by an amount determined by using the address of the called function's entry point to locate the static data item containing the called function's DSA size.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: Graham W. Ewart, Hans E. Boettiger, Patricia A. Healy, James T. Mulvey, Gregory T. Reid, David J. Sudlik
  • Patent number: 6934949
    Abstract: An IMS batch application, originally coded to execute as a DLI/DBB batch application, executes on a computer system as either a Batch Message Processing batch application or as the DLI/DBB batch application. The transfer of control to the IMS batch application is intercepted, wherein the transfer of control includes a list of PCB pointers. It is then determined if the IMS batch application is being invoked as a Batch Message Processing batch application. If the invocation is for a Batch Message Processing batch application, a modified list of PCB pointers is formed from the list of PCB pointers. The transfer of control to the IMS batch application is completed wherein the completion of the transfer of control includes passing either the modified list of PCB pointers if the IMS batch application is invoked as a Batch Message Processing batch application, or passing the unmodified list of PCB pointers if said IMS batch application is invoked as a DLI/DBB batch application.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: Alan R. Smith, James C. Wright
  • Patent number: 6934656
    Abstract: A method and system for identifying logic function areas, which make up a virtual machine, that are affected by specific testcases. A Hardware Descriptor Language (HDL) is used to create a software model of the virtual machine. A simulator compiles and analyzes the HDL model, and creates a matrix scoreboard identifying logic function areas in the virtual machine. A complete list of testcases is run on the virtual machine while a monitor correlates each testcase with affected logic function areas to fill in the matrix scoreboard. When a subsequent test failure occurs, either because of a modification to a logic function area, or the execution of a new test, all logic function areas that are affected, either directly or indirectly, are identified.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: Jason Michael Norman, Nancy H. Pratt, Sebastian Theodore Ventrone
  • Patent number: 6931723
    Abstract: A method for making a multi-layer electronic structure. A layer of dielectric material having a top surface and a bottom surface is provided. A layer of electrically conducting material is provided on one of the top surface and the bottom surface of the dielectric layer. At least one passage is formed through the dielectric layer to expose the layer of electrically conducting material. Electrically conducting material is deposited in at least one of the at least one passage through the dielectric layer. Portions of the layer of electrically conducting material are removed to define a pattern of circuitry. A stack is formed of plurality of structures including the layer of dielectric material and layer of electrically conducting material. The plurality of structures are aligned and joined together. Spaces between the structures are filled with electrically insulating material.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventor: Douglas O. Powell
  • Patent number: 6933189
    Abstract: A method and structure for a transistor device comprises forming a source, drain, and trench region in a substrate, forming a first insulator over the substrate, forming a gate electrode above the first insulator, forming a pair of insulating spacers adjoining the electrode, converting a portion of the first insulator into a metallic film, converting the metallic film into one of a silicide and a salicide film, forming an interconnect region above the trench region, forming an etch stop layer above the first insulator, the trench region, the gate electrode, and the pair of insulating spacers, forming a second insulator above the etch stop layer, and forming contacts in the second insulator. The first insulator comprises a metal oxide material, which comprises one of a HfOx and a ZrOx.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: Lawrence A. Clevenger, Louis L. Hsu, Carl J. Radens, Joseph F. Shepard, Jr.
  • Patent number: 6934950
    Abstract: Method, computer program product, and apparatus for efficiently dispatching threads in a multi-threaded communication library which become runnable by completion of an event. Each thread has a thread-specific structure containing a “ready flag” and a POSIX thread condition variable unique to that thread. Each message is assigned a “handle”. When a thread waits for a message, thread-specific structure is attached to the message handle being waited on, and the thread is enqueued, waiting for its condition variable to be signaled. When a message completes, the message matching logic sets the ready flag to READY, and causes the queue to be examined. The queue manager scans the queue of waiting threads, and sends a thread awakening condition signal to one of the threads with its ready flag set to READY. The queue manager can implement any desired policy, including First-In-First-Out (FIFO), Last-In-First-Out (LIFO), or some other thread priority scheduling policy.
    Type: Grant
    Filed: June 6, 2000
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: William G. Tuel, Jr., Rama K. Govindaraju