IBM Patents
The International Business Machines Corporation provides IT infrastructure and services to enterprise customers.
IBM Patents by Type- IBM Patents Granted: IBM patents that have been granted by the United States Patent and Trademark Office (USPTO).
- IBM Patent Applications: IBM patent applications that are pending before the United States Patent and Trademark Office (USPTO).
-
Patent number: 5268871Abstract: A voltage regulator is provided for controlling an on-chip voltage generator which produces a boost voltage across a charge reservoir for supply to one input of a plurality of word line drivers in a memory array. The regulator is configured such that the charge reservoir voltage will track the power supply voltage and the difference between the power supply voltage and the charge reservoir voltage will be maintained substantially constant over a predefined power supply range. The voltage regulator includes a bandgap reference generator, a first differential circuit for producing a transition voltage from the reference voltage and the power supply voltage, a first transistor for comparing the power supply voltage with the boost voltage, a second transistor for comparing the transition voltage with the reference voltage and a latching comparator for equating the signal outputs from the first and second transistors so as to define a control signal for the on-chip voltage generator.Type: GrantFiled: October 3, 1991Date of Patent: December 7, 1993Assignee: International Business Machines CorporationInventors: Sang H. Dhong, Hyun J. Shin, Wei Hwang
-
Patent number: 5268260Abstract: Simple, environmentally friendly developers and strippers are disclosed for free radical-initiated, addition polymerizable resists, cationically cured resists and solder masks and Vacrel photoresists. In all cases both the developers and the strippers include gamma butyrolactone, propylene carbonate and benzyl alcohol, optionally also including a minor amount of methanol, ethanol, isopropyl alcohol, propylene glycol monomethylacetate, ethylene glycol monomethyl ether, formamide, nitromethane, propylene oxide, or methyl ethyl ketone, acetone and water.Type: GrantFiled: October 22, 1991Date of Patent: December 7, 1993Assignee: International Business Machines CorporationInventors: Nageshwer R. Bantu, Anilkumar C. Bhatt, Ashwinkumar C. Bhatt, Joseph A. Kotylo, Gerald W. Jones, Robert J. Owen, Kostas Papathomas, Anaya K. Vardya
-
Patent number: 5268072Abstract: Etching processes are disclosed for producing a graded or stepped edge profile in a contact pad formed between a chip passivating layer and a solder bump. The stepped edge profile reduces edge stress that tends to cause cracking in the underlying passivating layer. The pad comprises a bottom layer of chromium, a top layer of copper and an intermediate layer of phased chromium-copper. An intermetallic layer of CuSn forms if and when the solder is reflowed, in accordance with certain disclosed variations of the process. In all the variations, the solder is used as an etching mask in combination with several different etching techniques including electroetching, wet etching, anisotropic dry etching and ion beam etching.Type: GrantFiled: August 31, 1992Date of Patent: December 7, 1993Assignee: International Business Machines CorporationInventors: Birendra N. Agarwala, Madhav Datta, Richard E. Gegenwarth, Christopher V. Jahnes, Patrick M. Miller, Henry A. Nye, III, Jeffrey F. Roeder, Michael A. Russak
-
Patent number: 5268735Abstract: According to the present invention, an optical inspection apparatus which can observe a light-transmitted portion and a light-reflected portion within objects of inspection, distinguishable from each other within the same field of vision, is provided.Type: GrantFiled: December 6, 1991Date of Patent: December 7, 1993Assignee: International Business Machines CorporationInventor: Ryutaro Hayashi
-
Patent number: 5268815Abstract: A high density circuit package includes a pair of planar packages, the planar packages exhibiting front and back surfaces and positioned back-to-back in the high density circuit package. Each planar package includes a flexible circuit carrier having a plurality of circuit chips mounted thereon. Front and back planar metallic heat sinks sandwich the circuit carriers, at least one of the heat sinks contacting a surface of the chips mounted on the sandwiched circuit carriers. Each heat sink is provided with air flow apertures formed in its planar surface and adjacent to each circuit chip. A circuit card interconnects with the circuit carriers in an interconnection region and is pluggable into a female connector. The planar metallic heat sinks and circuit carriers are mechanically packaged so as to provide a planar arrangement which aligns the apertures in both the front and rear heat sinks.Type: GrantFiled: July 30, 1992Date of Patent: December 7, 1993Assignee: International Business Machines CorporationInventors: Thomas M. Cipolla, Paul W. Coteus, Brian C. Derdall, Christina M. Knoedler, Alphonso P. Lanzetta, John J. Liutkus, Linda C. Matthew, Lawrence S. Mok, Irene A. Sterian
-
Patent number: 5268922Abstract: A method and apparatus for producing a laser diode assembly package is taught. Briefly stated, in a first embodiment, a housing having an access area at one end has a laser mounted therein. A collimator lens is placed at the other end of the housing and is movable along the optical axis of the laser output. This enables the collimator to be adjusted along the optical axis in order to produce an optimum amount of collimated light, with the housing and lens then be hermetically sealed with UV curable epoxy. In an alternate embodiment, the laser is mounted on a socket module which is then inserted into the housing.Type: GrantFiled: October 31, 1991Date of Patent: December 7, 1993Assignee: International Business Machines CorporationInventors: Jean-Claude Fouere, Claude Metreaud
-
Patent number: 5268951Abstract: A x-ray scanning method involves the stops of directing an x-ray beam at a collimating first mirror having the capability of altering the source to mirror location and/or grazing angle of incidence. The beam is then reflected from a flat second mirror capable of a scanning motion by linear translation with an optional accompanying angular change in the grazing angle of incidence of the beam on the second mirror.Type: GrantFiled: December 22, 1992Date of Patent: December 7, 1993Assignee: International Business Machines CorporationInventors: Alexander L. Flamholz, Robert P. Rippstein, Jerome P. Silverman, Matthew A. Thompson
-
Patent number: 5267471Abstract: An atomic force microscope that performs both atomic force and surface potential measurements on a sample comprises a conductive probe beam that includes two segments, a first segment exhibiting a first mechanical resonant frequency and a second segment exhibiting a second different mechanical resonant frequency. An actuator causes oscillations in the probe beam at the first mechanical resonant frequency. An oscillator applies to the probe beam a signal having a frequency equal to the second mechanical resonant frequency. Due to the potential difference between the probe beam and the sample, a force results that causes the probe beam to vibrate. The probe beam is moved over the sample's surface in a direction parallel to the surface. An optical heterodyne system senses movements of the probe beam at both the first and second resonant frequencies and provides an output signal indicative of the second resonant frequency movement of the probe beam's second segment.Type: GrantFiled: April 30, 1992Date of Patent: December 7, 1993Assignee: IBM CorporationInventors: David W. Abraham, Martin P. O'Boyle
-
Patent number: 5268330Abstract: A passivating layer is deposited over an integrated circuit device, conventionally fabricated using silicidation, after which an insulating layer is deposited. The insulating layer is planarized and further polished to expose the passivating layer above the gate. The portion of the passivating layer above the gate is removed with little or no effect on the insulating layer or gate. A trench above one or both junctions (source or drain) is formed by removing insulation using the passivating layer as an etch stop, then removing a portion of the passivating layer above the junction with little or no effect on the junction or any isolation region present. The gate may be further silicided, and the opening above the gate and the trench above the junction may each be planarly filled with a low sheet resistance conductive material, forming contacts. The contact above the junction may be borderless.Type: GrantFiled: December 11, 1992Date of Patent: December 7, 1993Assignee: International Business Machines CorporationInventors: John H. Givens, James S. Nakos, Peter A. Burke, Craig M. Hill, Chung H. Lam
-
Patent number: 5266505Abstract: An image reversal process for self-aligned implants in which a mask opening and plug in the opening are used to enable one implant in the mask opening, another self-aligned implant in the region surrounding the opening, and a self-aligned electrode to be formed in the opening.Type: GrantFiled: December 22, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: David C. Ahlgren, Shao-Fu S. Chu, Mary J. Saccamango, David A. Sunderland, Tze-Chiang Chen
-
Patent number: 5266933Abstract: Method and apparatus for displaying a horizontal screen separator line between two screen areas. A first step operates a display screen controller (12) in a split screen mode of operation so as to display a first screen area (3) at an upper portion of a display screen (18) and a second screen area (4) at a lower portion of the display screen. The step of operating further includes a step of reading data from a screen memory (42) and displaying rows of corresponding alphanumeric characters. Each character is displayed as a plurality of image pixels arranged along a first number of horizontal scan lines. A further step displays a horizontal visual separator (2) between a last row of the first screen area and a first row of the second screen area.Type: GrantFiled: May 4, 1993Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: David C. Frank, Shigeru Matsubara, Hiroshi Satoh, Stephen P. Thompson
-
Patent number: 5265670Abstract: A system provides convective transfer from a workpiece to a flowing fluid. A gap is formed between the workpiece and a facesheet containing fluid supply nozzles and fluid return nozzles. The fluid is fed to the supply nozzles, travels a short distance within the gap adjacent to the facesheet, and exits via return nozzles. The flow cross section and flow density facilitate heat transfer at a moderate flow rate and low fluid pressure. The system is also applicable for chemical transfer such as plating or etching printed circuit boards and for transfer through a semi-permeable membrane.Type: GrantFiled: April 27, 1990Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventor: Arthur R. Zingher
-
Patent number: 5266896Abstract: Methods and apparatus for detecting (and, if desired, imaging) the effects of magnetic resonance in a spin-containing material by measuring the magnetic force acting on a mechanical cantilever having a low damping coefficient due to modulation of the magnetic moment of the material in the polarizing field direction at a frequency substantially lower than the spin resonance frequency. Modulation of the magnetic moment in the direction of the polarizing magnetic field may be achieved by modulating (i) the magnitude of the magnetic field in the polarizing direction or (ii) the frequency or amplitude of a high-frequency magnetic field.Type: GrantFiled: June 9, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Daniel Rugar, John A. Sidles, Costantino S. Yannoni
-
Patent number: 5267216Abstract: A plurality of local address transition detector (LATD) circuits, one per address bit signal (Ai), of the type used in SRAMs to generate an on-chip clock pulse (LATDSi) that insures a correct timing of internal circuits such as sense amplifiers and address decoders that are essential for a correct READ/WRITE operation of the SRAM. According to one aspect of the invention, each LATD circuit includes: a first bipolar transistor (T1) serially connected with a first FET device (N1) forming a first branch; a second bipolar transistor (T2) serially connected with a second FET device (N2) forming a second branch. The first and second branches are connected in parallel between a first supply voltage (Vcc) and a common output node (N) connected to a circuit output terminal (30-i) where the output signal (LATDSi) generated by the LATD circuit (22-i) is available.Type: GrantFiled: July 27, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Bertrand Gabillard, Philippe Girard, Michel Grandguillot
-
Patent number: 5266520Abstract: In joining conductors at different levels on a carrier to contact locations on a planar substrate, mound shaped connections are employed, with the height of each mound shaped connection extending to the level of the particular conductor to which it is bonded. The mound shaped connections are formed using planar processes of controlled volume deposition, surface tension shaping on reflow, and physical deformation. The height of the mound shaped connections are calculated empirically from the volume deposited bounded by the substrate pad after surface tension limits the slump on reflowing.Type: GrantFiled: December 17, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Thomas M. Cipolla, Paul W. Coteus, Robert H. Katyl, Robert J. Kelleher, Paul A. Moskowitz
-
Patent number: 5266805Abstract: A system and method to compensate for effects of a recording medium such as film on image data retrieved therefrom. Red, green, blue, and infrared light is sequentially transmitted through film having an image exposed therein to the system which captures corresponding images. The infrared image maps the location, boundaries and intensities of the media defects. The map is employed combinatorially with the other captured images resulting in an image from the film free of the effects of the film defects. In one embodiment the effects of the imperfections are divided out from the red, green, blue spectra in an operation dividing out the infrared image data on a pixel-by-pixel basis. In an alternate embodiment wherein the imperfections substantially prevent transmission of IR light therethrough, the IR image map of the defects is nevertheless employed with an automated fill-in algorithm more effectively utilized due to the precision with which the defect boundaries are known.Type: GrantFiled: May 5, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventor: Albert D. Edgar
-
Patent number: 5267345Abstract: A language generator for a speech recognition apparatus scores a word-series hypothesis by combining individual scores for each word in the hypothesis. The hypothesis score for a single word comprises a combination of the estimated conditional probability of occurrence of a first class of words comprising the word being scored, given the occurrence of a context comprising the words in the word-series hypothesis other than the word being scored, and the estimated conditional probability of occurrence of the word being scored given the occurrence of the first class of words, and given the occurrence of the context. An apparatus and method are provided for classifying multiple series of words for the purpose of obtaining useful hypothesis scores in the language generator and speech recognition apparatus.Type: GrantFiled: February 10, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Peter F. Brown, Stephen A. Della Pietra, Vincent J. Della Pietra, Robert L. Mercer, Philip S. Resnik, Stanley S. Chen
-
Patent number: 5266901Abstract: A system and a method for testing the integrity of interconnection networks on a circuit board or substrate are disclosed. To test the continuity of a being tested network, two probes are used. To test the integrity of the being tested network, as it relates to other nets on the circuit board, a rectangular pulse is provided to the being tested network, and a signal in response to the stimulus pulse, provided across an external capacitor and resistor connected to the reference plane of the circuit board or substrate, is sampled by a transient analyzer. The leading edge of the thus sampled response signal provides an indication of whether the being tested net is acceptable, opened, shorted, or has a high leakage resistance to another net.Type: GrantFiled: May 29, 1992Date of Patent: November 30, 1993Assignee: International Business Machines Corp.Inventor: Ka-Chiu Woo
-
Patent number: 5267246Abstract: Apparatus and method for collecting and analyzing machine check interrupts generated by a central processor complex. Each logic card is scanned to detect the presence of error data generated by logic circuits on the card. A primary maintenance interface card collects the interrupt information identifying the interrupt as to type of interrupt and location of the card generating the interrupt. A system support adapter reports the collected interrupt information over a LAN to a support processor which may thereafter initiate diagnostic operations with the central processor complex.Type: GrantFiled: June 30, 1988Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Kevin C. Huang, John G. Santoni, Gregory S. Still
-
Patent number: 5267106Abstract: A system is disclosed for clamping disks in a spaced parallel relationship around a circular hub in a disk drive storage system. An annular clamp is provided which includes tabs extending inwardly into the aperture of the annular clamp which define a slightly smaller aperture. When a collapsing force is applied to the annular clamp, these tabs are displaced outwardly such that the annular clamp may be placed over the circular hub. The circular hub includes a lip for receiving the tabs and prohibiting axial movement of the annular clamp in response to a release of the collapsing force. Annular spacers are also disposed around the circular hub between adjacent disks. In a preferred embodiment of the present invention, each annular spacer includes multiple pads on each side thereof, minimizing any disk distortion which may be caused by spacer size variations.Type: GrantFiled: June 4, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Boyd M. Brue, Pete M. Herman, Jerry L. Neubauer, Steven H. Voss
-
Patent number: 5267240Abstract: A system and method for asynchronously transmitting data blocks, in parallel, across multiple fibers in a serial manner. Frame groups are provided as a mechanism to transmit associated data serially on each fiber and tie the data being transmitted together. The frame groups do not have sequence numbers, therefore, the receiver determines which frames are part of a frame group by the arrival times of the individual frames. In one embodiment, the transceivers for each member of the parallel bus asynchronously achieve synchronism at each end of the fiber. Thus the need for a common clock is eliminated. The receivers on each side of the bus determine the relative skew for each conductor by performing skew measurements on a calibration message generated by the transmitters on the other side of the bus. When the skew on all conductors, viewed from both sides of the bus, has been determined, the skew values are exchanged across the bus, thus enabling the transmitters to set proper frame spacing.Type: GrantFiled: February 20, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Neil G. Bartow, Paul J. Brown, Robert S. Capowski, Louis T. Fasano, Thomas A. Gregg, Gregory Salyer, Patrick J. Sugrue, Douglas W. Westcott, Vincent P. Zeyak, Jr.
-
Patent number: 5267110Abstract: A rotary actuator head driver for a direct access storage device includes a transducer head moving in a radial direction across a disk surface for reading and/or writing data on a plurality of tracks for storing data. A support arm supports the transducer head relative to the disk surface. The support arm is connected to a pivot defining an axis of rotation spaced from the transducer head. A head driver positions the transducer head over one track in a track following mode or moves the transducer head from one track to another track in a seek mode. The head driver generates oppositely directed forces to produce a net torque applied to the support arm through the pivot. The oppositely directed forces have a line of action orthogonal a dominant motion of the transducer head. As a result, any parasitic force is orthogonal to the dominant motion and does not contribute to track misregistration errors.Type: GrantFiled: March 19, 1991Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Hal H. Ottesen, Muthuthamby Sri-Jayantha
-
Patent number: 5267242Abstract: A computer memory maintainence apparatus tests operating system storage and identifies a malfunctioning memory chip in an on-line memory array by detecting and recording all permanent data errors using data comparison along with data complementation and substitutes a spare memory chip for the malfunctioning one for all memory read commands. All write commands are performed on both spare memory and the malfunctioning memory chip. All contents of defective chip are copied to the spare chip. The computer system maintains the scrubbing and a recording counter for each of the data bits in an ECC memory data word. The sparing logic in the memory storage system maintains the bit steering logic and controls for the spare chip. When a counter is incremented above a threshold sparing is invoked to replace the failing bit position. The system writes to the defective and spare chips in parallel even after bit steering is invoked.Type: GrantFiled: September 5, 1991Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Russell W. Lavallee, Donald G. O'Brien, Michael Rubino, William W. Shen, George C. Wellwood
-
Patent number: 5266504Abstract: A method of manufacturing a bipolar transistor by use of low temperature emitter process is disclosed. After completion of the usual base and collector formation in a vertical bipolar transistor, an emitter opening is etched in the insulator layer over the base layer at selected locations. A thin layer (less than 500 .ANG.) of in-situ doped amorphous silicon is deposited over the substrate and heated to densify for 30 to 60 minutes at about 650.degree. C. Subsequently an in-situ doped polysilicon layer of 100 to 200 nm is deposited over the amorphous Si film preferably at about 600.degree. C. Subsequently the layers are heated below 600.degree. C. for several hours to convert partially the amorphous Si into a monocrystalline emitter layer over the base regions.Type: GrantFiled: March 26, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Jeffrey L. Blouse, Jack O. Chu, Brian Cunningham, Jeffrey P. Gambino, Louis L. Hsu, David E. Kotecki, Seshadri Subbanna, Zu-Jean Tien
-
Patent number: 5267127Abstract: This invention relates to a personal computer with a folding keyboard and, more particularly, to a personal computer contained within a compact enclosure when stored in a non-use position. The personal computer has a clamshell enclosure having first and second housings joined for pivotal movement one relative to the other about an elongate housing axis and between a folded position and a use position. Computer operating components are mounted in the enclosure. A keyboard assembly is operatively associated with the enclosure and the computer operating components and has first and second keyboard portions each bearing manually engageable elements for entering characters and commands.Type: GrantFiled: October 22, 1992Date of Patent: November 30, 1993Assignee: International Business Machines Corp.Inventor: Richard F. Pollitt
-
Patent number: 5267104Abstract: A data recording disk file of the liquid-bearing type has an improved head-disk interface provided in by a transducer carrier with new properties. The carrier supports a conventional head for reading and writing data to the disk. The carrier has an air-bearing surface near its front end, a ski pad near its rear end, and a plurality of ski feet or struts which support the air-bearing surface off the liquid film of the disk when the disk file is not operating. The air-bearing surface is in the form of a pair of air-bearing rails located outboard of the rear ski pad so that no air-bearing effect occurs in the rearward region of the carrier to assure the skiing action of the rear ski pad. As operational speed is approached the air-bearing lifts the struts off the disk and the rear ski pad is the sole ski foot on the liquid film.Type: GrantFiled: April 30, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Thomas R. Albrecht, Moris M. Dovek, John S. Foster, Andrew M. Homola, Timothy C. O'Sullivan
-
Patent number: 5266897Abstract: Tunneling microscopy can be used to observe simultaneously the topography of a sample surface that is conductive and data related to the magnetic field near the surface. A tunneling microscope apparatus has a cantilever supporting a tip which has a magnetic moment. To use the apparatus according to a first preferred method, a magnetic field alternating at a predetermined frequency is produced by the sample near the sample surface to vibrate the tip by a magnetic interaction with the magnetic moment. To use the apparatus according to a second preferred method, the direction of the magnetic moment of the tip is switched at a predetermined frequency to vibrate the tip by creating an interaction between the magnetic moment and a magnetic field of the sample. For both preferred methods, the tip is maintained at a distance from the sample surface so as to permit a tunneling current to flow.Type: GrantFiled: February 24, 1993Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Osaaki Watanuki, Fuminori Sai, Kuniaki Sueoka
-
Patent number: 5266522Abstract: This invention relates generally to structure and method for corrosion- and stress-resistant interconnecting metallurgy, and more specifically to new structures and methods for corrosion- and stress-resistant interconnecting multilayer metallurgical pad comprising sequentially deposited layers of chromium, nickel and noble or relatively noble metal as the interconnecting metallurgy, or multilayer metallurgical pad comprising sequentially deposited layers of chromium, soluble noble metal, nickel and noble or relatively noble metal as the interconnecting metallurgy. This invention also relates to an improved multilayer metallurgical pad or metallurgical structure for mating at least a portion of a pin or a connector or a wire to a substrate.Type: GrantFiled: June 5, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Giulio DiGiacomo, Armando S. Cammarano, Nunzio DiPaolo
-
Patent number: 5266769Abstract: A method for making a magnetic head slider comprising the steps of lapping the slider to form an air bearing surface, producing a chosen pattern of rails on the air bearing surface, and producing a chosen pattern of stress on the back side of the slider to remove the distortion produced in the slider by the lapping and rail formation steps. The stress pattern can be chosen to produce any desired range of crown and camber for the slider.Type: GrantFiled: February 25, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Annayya P. Deshpande, Randall T. Kerth, Henri M. Nier
-
Patent number: 5266813Abstract: The present invention is an isolation structure for use with FET or bipolar devices incorporating a silicon-germanium layer in which the semiconductor devices are isolated by trench structures. A trench is etched through a pad layer, a single crystal silicon layer, a silicon-germanium layer, and finally, into the silicon substrate. The silicon-germanium layer is interposed between the single crystal silicon layer and the silicon substrate and the pad layer covers the single crystal silicon layer. The trench sidewall exposes the silicon-germanium layer. A single crystal silicon layer is formed as a trench liner. This silicon trench liner is then oxidized to passivate the trench isolation. The trench can then be filled with a dielectric without the devices being affected by parasitic leakage caused by the silicon-germanium layer exposed by the trench isolation.Type: GrantFiled: January 24, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: James H. Comfort, David L. Harame, Scott R. Stiffler
-
Patent number: 5266850Abstract: Method and circuitry for phase synchronizing an analog input signal with a clock signal by sensing clock delay error, adjusting in increments clock delay trim of a delay element that initially has an arbitrary delay setting, and stopping adjustment after differential delay between the signals has been eliminated.Type: GrantFiled: June 30, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Hoan A. Au, Arvind M. Patel, Robert A. Rutledge, Bum S. So, Albert S. Su
-
Patent number: 5266446Abstract: A method of making a multilayer thin film structure on the surface of a dielectric substrate which includes the steps of:a. forming a multilayer thin film structure including the steps of:applying a first layer of dielectric polymeric material on the surface of a dielectric substrate,applying a second layer of dielectric polymeric material over the first layer of polymeric material wherein the second polymeric material is photosensitive,imagewise exposing and developing the second polymeric material to form a feature therein, the second layer feature in communication with at least one feature formed in the first polymeric material; andb. filling the features in the entire multilayer structure simultaneously with conductive material.Preferably, the first layer feature is a via and the second layer feature is a capture pad or wiring channel. Also disclosed is a multilayer thin film structure made by this method.Type: GrantFiled: May 26, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Kenneth Chang, George Czornyj, Mukta S. Farooq, Ananda H. Kumar, Marvin S. Pitler, Heinz O. Steimel
-
Patent number: 5267156Abstract: A method and apparatus for machine translation of language is disclosed. For each translation pattern, qualified words and corresponding translations are extracted. The invention generalizes words by converting them into concepts which are more general and can be applied to many inputs. A partial thesaurus is generated that describes hierarchies of words and concepts that are hypernyms of these words. Based on frequency information obtained for the words, an importance value is computed for each concept. Importances are used to determine the possibility of generalizing concepts in the translation.Type: GrantFiled: December 5, 1991Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventor: Hiroshi Nomiyama
-
Patent number: 5267047Abstract: A system-wide data stream compatibility is provided for a FAX server in an image archiving system, by the concealment of FAX cover sheet and distribution list object handling information, which is uniquely required by the FAX server, in an otherwise unneeded document descriptor field located outside of the data stream boundary, in the distribution service or session header. In addition, the FAX server provides for the storage of multiple cover sheets and addressee distribution lists which are editable. The FAX server can manage multiple transmissions of FAX messages with customized cover sheets, to multiple addressees in the distribution lists.Type: GrantFiled: April 30, 1991Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Joseph T. Argenta, David C. Bailey, Harold F. DeBruyn, Hugh M. Morris
-
Patent number: 5266558Abstract: These superconducting circuit elements, namely SNS heterostructures, such as, e.g. Josephson junctions and field-effect transistors, have a sandwich structure consisting of at least one layer of high-T.sub.c superconductor material arranged adjacent to a metallic substrate, possibly with an insulating layer in between, the substrate, the superconductor and--if present--the insulator all consisting of materials having at least approximately matching molecular structures and lattice constants. Electrical contacts, such as source, drain and gate electrodes are attached to the superconductor layer and to the substrate, respectively. The electrically conductive substrate consists of a metallic oxide such as strontium ruthenate Sr.sub.2 RuO.sub.4, whereas the superconductor layer is of the copper oxide type and may be YBa.sub.2 Cu.sub.3 O.sub.7-.delta., for example. The insulator layer (10) may consist of SrTiO.sub.3.Type: GrantFiled: February 27, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Frank Lichtenberg, Jochen Mannhart, Darrell Schlom
-
Method and composition for obtaining image reversal in epoxy formulations based upon photoinhibition
Patent number: 5266444Abstract: A method and composition are shown for producing a positive-acting photoimagible epoxy resin. In addition to the epoxy resin, the compositions include a dual component cross-linking system which combines a basic curing agent with an onium or arylonium salt. The onium or arylonium salt produces a protic acid upon exposure to irradiation causing a reaction with the basic curing agent which renders the agent ineffective as an epoxy curing agent during subsequent heating. During a subsequent bake operation, only the unexposed regions of the epoxy will cross-link. As a result, the exposed areas wash away, leaving only the cured reverse image.Type: GrantFiled: September 10, 1992Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventors: Burton J. Carpenter, Jr., Joseph LaTorre, Michael G. McMaster, Logan L. Simpson -
Patent number: 5267227Abstract: Disk storage apparatus includes a loading and unloading mechanism for moving a recording disk from an insertion position to a reproduction position within the apparatus. When the disk is in the reproduction position, a locking mechanism is moved out of contact with an actuator which carries a read/write head so that the head can be moved across the surface of the disk by a motor mounted on the actuator. When an eject command is received, the actuator is moved to an inner crash stop and the disk is moved out of the reproduction position causing the locking mechanism to move into mechanical engagement with the actuator. A magnet carried on the locking means is moved adjacent a magnet within the motor so that the mechanical locking engagement is enhanced magnetically.Type: GrantFiled: October 15, 1991Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventor: Koichiro Nanke
-
Patent number: 5265206Abstract: A system for implementing a messenger and object manager in an object oriented programming environment on a data processor containing a memory, in which objects are categorized into one or more classes which define methods of the objects categorized therein, and in which messages are sent by the data processor to objects to perform actions thereon. The system includes a message call processing procedure operating on the data processor for processing message calls to instances, including a method resolution segment for calling a loaded classes table to determine whether the class corresponding to a method of the instance is loaded, where the method corresponds to the action requested by the message. If the corresponding class is not loaded in main memory, then the system dynamically loads the class. A data resolution segment calls an object management table to resolve an indirection pointer which points to the address of a data frame corresponding to the instance.Type: GrantFiled: October 23, 1990Date of Patent: November 23, 1993Assignee: International Business Machines CorporationInventors: Floyd W. Shackelford, Cynthia A. Ross, William L. Rich, Robert L. Abraham, John R. Tiller, Jr., Richard E. Moore, Richard S. Briggs, Jr.
-
Patent number: 5263537Abstract: A computer cooling system provides a more efficient means of cooling, resulting in lower average temperatures and better reliability for the system. It comprises of a rotating baffle or set of baffles, and a formed enclosure. The enclosure accepts cooling fluid in a direction that is parallel to one of its walls. The enclosure is such that a recirculating airflow pattern is set up in its cavity. As the baffle rotates the direction of fluid flow reverses itself in the cavity of the enclosure. The turbulence created by such a system greatly enhances the rate of heat transfer on the components within the enclosure. The exact dimensions of the baffle, and frequency with which it oscillates will depend on the specific system.Type: GrantFiled: April 27, 1992Date of Patent: November 23, 1993Assignee: International Business Machines CorporationInventors: Mark D. Plucinski, William C. Miller
-
Patent number: 5265238Abstract: Apparatus and a method for automatically configuring communication port assignments in dockable portable computer systems wherein a portable computer unit is operable both on a stand-alone basis and attached (docked) to a generally stationary expansion (docking) unit providing extended connectivity and power sourcing facilities. The portable computer unit may contain integral connectors (RS232, telephone jacks, parallel port connectors, etc.) and internal circuit devices operating through the connectors (modems, circuits supporting RS232 signalling, etc.). The docking unit may also have such connectors and associated circuits. The computer user may assign internal logical communication paths com x (x=1, 2, . . . ) to these connectors and their associated circuits. When the portable unit is in a docked mode, care must be taken that duplicate paths are not concurrently active in the portable and docking units leading to potentially conflicting signal processes in the units.Type: GrantFiled: January 25, 1991Date of Patent: November 23, 1993Assignee: International Business Machines CorporationInventors: Francis J. Canova, Jr., Neil A. Katz, Shaun Astarabadi, Robert L. Horton
-
Patent number: 5265164Abstract: A computer apparatus, program and method function in a data processing system to replicate a cryptographic facility. The system includes a first cryptographic facility containing a portable part which personalizes the first cryptographic facility. The system also includes a second cryptographic facility which is linked to the first cryptographic facility by a public key cryptographic system. The portable part of the first cryptographic facility is encrypted and transferred to the second cryptographic facility, where it is decrypted and used to personalize the second cryptographic facility to enable replication of the first cryptographic facility. In one application, personalization of the second cryptographic facility can be in response to the detection of a failure in the first cryptographic facility. In another application, multiple cryptographic facilities can be brought on-line for parallel operation in the data processing system.Type: GrantFiled: October 31, 1991Date of Patent: November 23, 1993Assignee: International Business Machines CorporationInventors: Stephen M. Matyas, Donald B. Johnson, An V. Le, Rostislaw Prymak, William C. Martin, William S. Rohland, John D. Wilkins
-
Patent number: 5265260Abstract: A database accelerator that uses the Van Voorhis sort network is implemented as a state machine using the same hardware in succeeding cycles. The database accelerator comprises high performance sort (HPS) hardware that includes working store elements for storing data records to be sorted, a plurality of comparator modules, control read only memories (ROMs), and storage control elements (SCEs). The SCEs direct respective pointer arrays and storage elements, and the storage elements provide addresses to the working store elements, which in turn feed data to the comparator modules. The control ROMs provide control signals to each comparator module as well as global control for the HPS hardware.Type: GrantFiled: June 26, 1991Date of Patent: November 23, 1993Assignee: International Business Machines CorporationInventor: Jerry E. Hendricks
-
Patent number: 5264387Abstract: A method comprising the steps of: providing a substrate including an insulator material having a generally planar surface; forming a plurality of mesas of a semiconductor material on the substrate surface, the plurality of mesas spaced by channels extending to the substrate surface, the plurality of mesas including device mesas and dummy mesas; forming a polish-stop structure of at least one selected material over the substrate surface in the channels; polishing the plurality of mesas and stopping on the polish-stop structure whereby the plurality of mesas have the same thickness as the polish-stop structure; and replacing the dummy mesas with an insulator material whereby to electrically isolate the device mesas.Type: GrantFiled: October 27, 1992Date of Patent: November 23, 1993Assignee: International Business Machines CorporationInventors: Klaus D. Beyer, Mark A. Jaso, Subramanian S. Iyer, Scott R. Stiffler, James D. Warnock
-
Patent number: 5265255Abstract: This disclosure relates to personal computer systems, and more particularly to a personal computer which provides for interrupt redirection of the activity of a microprocessor. The personal computer system has a multichannel bus for transferring data, a microprocessor for manipulating data and coupled to the bus, and a plurality of input/output devices coupled to the bus for receiving and delivering data for manipulation by the microprocessor. Each input/output device is capable of generating a logical interrupt signal indicative of a request for access to the microprocessor and of being remotely reset to a non-interrupt condition, and all of the devices deliver their logical interrupt signals through a common physical channel of the bus.Type: GrantFiled: September 24, 1990Date of Patent: November 23, 1993Assignee: International Business Machines Corp.Inventors: Francis M. Bonevento, Ernest N. Mandese, Richard N. Mendelson
-
Patent number: 5263245Abstract: An electronic package which includes a substrate having a dielectric layer, a circuitized layer located on one surface of the dielectric and a thermally and electrically conductive layer located on a second surface of the dielectric, this thermally and conductive layer designed for providing enhanced heat removal from the package's semiconductor device. A pedestal element is located on or formed as part of the thermal and electrically conductive layer, and extends through the dielectric and circuitized layers for having the semiconductor device positioned thereon. The semiconductor device is thus in substantially direct thermal communication with the pedestal element and thus the adjacent, thick thermal conductive layer which functions as the package's heat sink. In one embodiment, solder is provided on the pedestal element to interconnect desired portions of the circuitized layer with the pedestal element (e.g., to provide electrical ground).Type: GrantFiled: February 16, 1993Date of Patent: November 23, 1993Assignee: International Business Machines CorporationInventors: Maganlal S. Patel, John J. Zopff
-
Patent number: 5265193Abstract: An improved expert system method for use with the RETE pattern matching algorithm is disclosed. At the heart of the invention is the concept of a "shuffleboard," a data structure conducive to sorting elements. The shuffleboard is essentially a list of lists. It is comprised of a set of nodes which are linked together in a series of columns. Each column corresponds to a test condition within a rule, and each node within a column corresponds to a variable referenced by the test condition. The shuffleboard approach provides a means of finding all tests using a given variable and associating those tests. The shuffleboard provides a frame of reference for constructing a new ordering of tests from which the RETE network can be constructed.Type: GrantFiled: April 30, 1992Date of Patent: November 23, 1993Assignee: International Business Machines CorporationInventors: Charles R. Grady, Greig Greenwald
-
Patent number: 5265163Abstract: A computer system having a power-on password stored in non-volatile memory wherein entry of the power-on password by a system manager permits access to all of the computer functions. The system also has the facility of at least one additional password held in non-volatile memory, wherein entry of the additional password by a user permits the system to boot in a manner preselected by the system manager. Preferably there are available a plurality of additional passwords providing at least two different levels of security access to the system.Type: GrantFiled: April 30, 1990Date of Patent: November 23, 1993Assignee: International Business Machines Corp.Inventors: Victor G. Golding, Gregor H. Speirs
-
Patent number: 5265202Abstract: A method and system for accessing visually obscured data in a data processing system having a computer application displayed concurrently with a video image in a window which partially overlaps the computer application. The location of the video image within the window is maintained in relation to the visually obscured data within the computer application. The video image, which is comprised of a plurality of lines of video data, is then temporarily altered to a translucent state by omitting selected lines of video data. This renders the video image partially visible, allowing the visually obscured data within the computer application to be seen through the video image. The visually obscured data may now be visually accessed through the video image.Type: GrantFiled: August 28, 1992Date of Patent: November 23, 1993Assignee: International Business Machines CorporationInventors: Leroy A. Krueger, Edward S. Rozmiarek, James G. Tench, Jr.
-
Patent number: 5264716Abstract: A high density substrate plate DRAM cell memory device is described in which a buried plate region is formed adjacent to deep trench capacitors such that the substrate region of DRAM transfer FETs can be electrically isolated from other FETs on a semiconductor substrate. The buried region is partially formed by lateral outdiffusion from the sidewalls of the deep trenches and partially formed by an N-well surface diffusion which entirely surrounds the DRAM array region.Type: GrantFiled: January 9, 1992Date of Patent: November 23, 1993Assignee: International Business Machines CorporationInventor: Donald M. Kenney
-
Patent number: D341821Type: GrantFiled: July 19, 1991Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventor: Dino M. Savio