Patents Examined by A. K. A.
  • Patent number: 7586190
    Abstract: An optoelectronic component (1) having a semiconductor arrangement (4) which emits and/or receives electromagnetic radiation and which is arranged on a carrier (22) which is thermally conductively connected to a heat sink (12). External electrical connections (9) are connected to the semiconductor arrangement (4), where the external electrical connections (9) are arranged in electrically insulated fashion on the heat sink (12) at a distance from the carrier (22). This results in an optimized component in terms of the dissipation of heat loss and the radiation of light and also in terms of making electrical contact and the packing density in modules.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: September 8, 2009
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Georg Bogner, Patrick Kromotis, Ralf Mayer, Heinrich Noll, Matthias Winter
  • Patent number: 7501341
    Abstract: An interconnect array formed at least in part using repeated application of an interconnect pattern is described. The interconnect pattern has at least ten interconnect locations. One of the ten interconnect locations is for a power interconnect. Another one of the ten interconnect locations is for a ground interconnect. At least eight interconnect locations remaining are for additional interconnects. The at least eight remaining interconnect locations disposed around a medial region, where either the ground interconnect or the power interconnect is located in the medial region. An offset region having the one of either the ground interconnect or the power interconnect not in the medial region. The interconnect array is at least partially formed by repeated application of the interconnect pattern off-set from one another responsive to the offset region.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: March 10, 2009
    Assignee: Xilinx, Inc.
    Inventor: Brian Von Herzen