Patents Examined by A. Zarabin
  • Memory circuit and method of construction
    Patent number: 6072715
    Abstract: A memory circuit (10) is provided. The memory circuit comprises a flip-flop (12) and first and second pass gate transistors (14) and (16). The flip-flop (12) also comprises pull down transistors (18) and (20). The gate of each pull down transistor (18) and (20) is doped at a level that is greater than the doping level for each gate of pass gate transistors (14) and (16).
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: June 6, 2000
    Assignee: Texas Instruments Incorporated
    Inventor: Thomas C. Holloway