Patents Examined by Aaron D Matthew
  • Patent number: 6950964
    Abstract: Systems and methods are provided that prevent faulty drivers from being loaded and/or can prevent faulty drivers from being installed. Thus, instability of a computer system can be mitigated. Additionally, the occurrence of data corruption, system halting and the like can be reduced. A requested driver is compared to a list of faulty drivers from a faulty driver database. If the requested driver is in the list of faulty drivers, the requested driver is deemed faulty or defective, and is prevented from being loaded. Additionally, if the requested driver is in the list of faulty drivers, the requested driver can be prevented from being installed. Otherwise, the requested driver is operable and can be installed and/or loaded.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: September 27, 2005
    Assignee: Microsoft Corporation
    Inventors: Lonny Dean McMichael, George Evangelos Roussos, Eugene Lin, Jason Ty Cobb, Santosh Sharad Jodh, Bjorn Levidow, Vadim Bluvshteyn, Mark Derbecker
  • Patent number: 6950969
    Abstract: A fan controller is described herein that can be connected to other fan controllers to provide fault information from one controller to the other(s). The fan controllers each control one or more fans. The controllers include signal(s) connected between the controllers that transmit fault information from one fan controller to the other(s) without the involvement of the host processor. Further, the controllers are capable of performing a “free wheeling” test in which idle fans are spun and tested.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: September 27, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Clarence Rick Thompson, Melvin Benedict, Vivian McDaniels-Sanders, Jeffrey S. Autor, John S. Lacombe, Michael C. Sanders
  • Patent number: 6948092
    Abstract: A computer system includes a primary processor and a secondary processor running in lockstep. The lockstep may or may not be synchronous. Errors occurring in the primary processor or the secondary processor are reported to an error-handling module. If the error is a recoverable error, the state of one of the processors is saved and the processors are restarted using the saved state. In addition to the reporting of errors from the processors, cross checking of the operation of the processors is performed to detect a divergence in the operation of the processors. If the divergence is reported to be due to a recoverable error, the state of the one of the processors is saved and the processors are restarted using the saved state. Procedures are also disclosed to ensure that data corruption does not propagate onto an associated network, and to ensure that the system is not lost as a network resource during processor restart.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: September 20, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Thomas J. Kondo, James S. Klecka, Robert L. Jardine, William P. Bunton, Graham B. Stott
  • Patent number: 6944794
    Abstract: The invention is the microcontroller, which comprises CPU, a bus controller, an instruction address bus of a first bit number and an instruction code bus of a second bit number, which connect between the CPU and bus controller, and, further, a debug support unit, which is connected to the instruction address bus and instruction code bus. This debug support unit is also connected to an external in-circuit emulator via a tool bus of a third bit number that is smaller than the first bit number and via a bus-status signal line that reports on the status of this tool bus. The debug support unit has a data output circuit, which, in response to the status information signal, when the branch information contains a branch, outputs the converted instruction address serially to the tool bus, and when the branch information contains no branch, outputs a branchless signal to the tool bus.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: September 13, 2005
    Assignee: Fujitsu Limited
    Inventors: Toru Okabayashi, Koutarou Tagawa
  • Patent number: 6910156
    Abstract: A diagnostic method and system for a technical installation establish the cause of a fault event. A reliable, flexible and simple possible way of diagnosing an installation is provided by placing state variables that characterize an operating state of the technical installation in a dependency tree and establishing a fault path in the dependency tree by linking change directions of diagnostic parameters contained in the dependency tree.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: June 21, 2005
    Assignee: Siemens Aktiengesellschaft
    Inventor: Gottfried Adam
  • Patent number: 6877113
    Abstract: A semiconductor integrated circuit including a debugging support unit and a buffer memory for temporarily storing trace data, the debugging support unit comprising a break detection member that detects a break signal externally inputted and a break determining member that determines whether the break signal requests to shift to break processing after outputting all the trace data stored in the buffer memory or the break signal requests to shift to the break processing with immediately suspending trace data outputting.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: April 5, 2005
    Assignee: Fujitsu Limited
    Inventors: Toshiaki Saruwatari, Koutarou Tagawa
  • Patent number: 6871295
    Abstract: A system and method for dynamic data recovery is described. The system and method for dynamic data recovery operates on a computer storage system that includes a plurality of disk drives for storing parity groups. Each parity group includes storage blocks. Each of the storage blocks is stored on a separate disk drive such that no two storage blocks from a given parity set reside on the same disk drive. The computer storage system further includes a recovery module to dynamically recover data that is lost when at least a portion of one disk drive in the plurality of disk drives becomes unavailable. The recovery module is configured to produce a reconstructed block by using information in the remaining storage blocks of a parity set that corresponds to an unavailable storage block.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: March 22, 2005
    Assignee: Adaptec, Inc.
    Inventors: Thomas R. Ulrich, James R. Schweitzer, Gregory D. Bolstad, Jay G. Randall, John R. Staub, George W. Priester
  • Patent number: 6862698
    Abstract: A method for generating compressed correlation key values for use in correlating alarms generated by network elements in a telecommunications network is disclosed. An alarm message generated by a network element is received. A context value in the alarm message is identified. A table that associates context values to correlation key value formulas is maintained. A formula specifying how to generate the correlation key value is retrieved from the table. Each formula may specify, for an associated context value, one or more ordinal positions of fields in the alarm message, a concatenation of which yields the correlation key value. The correlation key value is created based on the formula. A unique ordinal number is generated to represent the correlation key value, which acts as a context key. The alarm message and correlation key value are sent to an external system for use in correlating alarms.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: March 1, 2005
    Assignee: Cisco Technology, Inc.
    Inventor: Jackson Shyu
  • Patent number: 6862693
    Abstract: One embodiment of the present invention provides a system that facilitates fault-tolerance by using redundant processors. This system operates by receiving store operations from a plurality of redundant processors running the same code in lockstep. The system compares the store operations to determine if the store operations are identical, thereby indicating that the redundant processors are operating correctly. If the store operations are identical, the system combines the store operations into a combined store operation, and forwards the combined store operation to a system memory that is shared between the redundant processors. If the store operations are not identical, the system indicates an error condition. In a variation on this embodiment, the system similarly combines store operations.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: March 1, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Shailender Chaudhry, Marc Tremblay