Patents Examined by Abu Hossain
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Patent number: 6122733Abstract: An apparatus includes a storage medium having stored therein a segmented basic input/output system (BIOS) divided among a plurality of segments within the storage medium, and a processor operative to execute the segmented BIOS. In accordance with the teachings of the present invention, the BIOS includes a recovery function that is mode dependent in that while the apparatus is in an update mode the recovery function executes a full reflash of all relevant segments of the segmented BIOS, whereas while the apparatus is in a normal mode the recovery function executes a partial reflash of only identified corrupted BIOS segments.Type: GrantFiled: September 30, 1997Date of Patent: September 19, 2000Assignee: Intel CorporationInventors: Orville H. Christeson, Frank L. Wildgrube, Frank E. LeClerg, Jerald Nevin Hall, Mike Kinion, Sean R. Babcock, John Yuratovac
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Patent number: 6105147Abstract: The present invention is a process-pair resource manager for use in a transaction processing system. The process-pair resource manager includes a concurrent aspect and a serial aspect. The concurrent aspect provides an object-like interface to a protected resource. An application program participating in a transaction accesses the protected resource by passing messages to the concurrent aspect. The concurrent aspect adds a description of each message as well as the result of processing each message to a transaction record. At the conclusion of a transaction, the concurrent aspect passes the transaction record to the serial aspect. The serial aspect then replays the transaction, using the transaction record. If the replay of the transaction is consistent with the transaction as recorded in the transaction record, the serial aspect sends a message to the concurrent aspect voting to commit the transaction. In turn, the concurrent aspect sends a message to the transaction manager forwarding the commit message.Type: GrantFiled: April 16, 1997Date of Patent: August 15, 2000Assignee: Compaq Computer CorporationInventor: Mark E. Molloy
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Patent number: 6012142Abstract: A message is transferred from external device through a first processor and from the first processor to a second processor. A check is made that the message passed to the second processor without error. The message is interpreted by a selected one of the first and second processors. Boot operations are performed by the selected processor in response to the interpretation of the message.Type: GrantFiled: November 14, 1997Date of Patent: January 4, 2000Assignee: Cirrus Logic, Inc.Inventors: Miroslav Dokic, Raghunath Rao, Terry Ritchie, James Divine, Jeffrey Niehaus, Zheng Luo
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Patent number: 6012151Abstract: An information processing apparatus includes at least one input and output devices each having a plurality of input and output ports, and a plurality of processors which, connected to the one or the plurality of input and output ports via a bus, process requests for processes requiring a use of the input and output ports in a distributed manner.Type: GrantFiled: April 21, 1997Date of Patent: January 4, 2000Assignee: Fujitsu LimitedInventor: Kosei Mano
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Patent number: 6009518Abstract: A computer system and method for storing distinct data types is disclosed. The computer system includes a plurality of data storage devices wherein data of a first type may be stored on a first one of the data storage devices and data of a second type may be stored on at least another one of the data storage devices, wherein at least one of the data types requires controlling access thereto. The invention provides for ensuring the integrity of the data stored on the data storage devices. It also prevents misappropriation of data stored on the devices. The invention includes a switch which selects one of the data storage devices for use with a computer system. Selecting a data storage device activates and places it in an operational mode. The remaining data storage devices are placed into a non-operational mode.Type: GrantFiled: January 15, 1997Date of Patent: December 28, 1999Inventor: Peter Paul Shiakallis
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Patent number: 5996074Abstract: Apparatus for configuring a computer system is adapted to allow configuration to occur on the system unit without removing the system unit from its packaging. By so preparing and operating the unit that it can function to a degree as a network client, it is possible to perform steps for configuring "in the package" that violate normal self test expectations. With this abnormal operating environment and operation the system is placed in condition to be removed from the packaging at the user's location with BIOS and program image customized for the user. This approach provides a freshly configured system and yet eliminates unpacking at a configuration center and then repacking for transfer to the user or the need for refresh configuration at the user site as the system unit is set up for normal use.Type: GrantFiled: November 15, 1997Date of Patent: November 30, 1999Assignee: IBM International Business Machines CorporationInventors: Keith Coleman Houck, David B. Rhoades, John Joseph Edward Turek
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Patent number: 5991896Abstract: A technique for protecting an electronic system having a programmable input/output interface from erroneous operation due to static electricity includes the steps of: (a) setting an internal timer for continuously resetting a program state of the input/output interface at a predetermined time interval; (b) storing a present program state of the input/output interface after setting the timer; (c) resetting the stored program state of the input/output interface when a value of a driven timer corresponds to a value of the set timer after storing the present program state of the input/output interface; (d) repeatedly resetting the program state of the input/output interface by driving again the timer after resetting the program state of the input/output interface.Type: GrantFiled: July 24, 1997Date of Patent: November 23, 1999Assignee: SamSung Electronics Co., Ltd.Inventor: Sung-Min Cho
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Patent number: 5987620Abstract: A self-timed and self-enabled distributed clock is provided for pipeline processor design having functional blocks which include one or more pipeline stages for processing instructions and operations. Each pipeline stage of the processor includes self-timed logic and an enable signal to set up the valid data input to the next pipeline stage. The self-timed logic is used instead of a central, synchronous clock having a predetermined period and provides flexibility of expanding or contracting the clock period in multiple time units depending on the functionality of each pipeline stage. The interfacing between the pipeline stages is handled by a queue buffer which stores incoming instructions to keep the pipeline fully occupied any time there are instructions in the pipeline. A functional unit and its distributed clock are activated only if there is instruction in the pipeline and is otherwise idle.Type: GrantFiled: November 14, 1997Date of Patent: November 16, 1999Assignee: Thang TranInventor: Thang Tran
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Patent number: 5968180Abstract: A method and apparatus for capturing data. A first latch latches data from a data source in response to respective rising edge transitions of a first clock signal. A second latch latches data from the data source in response to respective falling edge transitions of the first clock signal. A delay circuit generates a second clock signal that lags the first clock signal by a delay period and, in response to respective transitions of the second clock signal, a multiplexer alternately selects the first latch and the second latch to output data to a storage element. A pulse strobe circuit strobes the output data into the storage element in response to the first clock signal and the second clock signal being in different states.Type: GrantFiled: September 30, 1997Date of Patent: October 19, 1999Assignee: Intel CorporationInventor: Joseph C. Baco
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Patent number: 5968142Abstract: A computer (10, 11, 12) is provided with a physically-removable resource in the form of a smartcard (20) including user logon information (for local and/or remote resources). Upon at least the removal of the smartcard (20), different behaviours are produced depending on whether a predetermined keyboard key, such as the ALT key, is depressed. Thus, assuming that the smartcard (20) has been used for logging on, then upon removal of the smartcard if the ALT key is not depressed, a logoff procedure is effected whereas if the ALT key is depressed at the time the smartcard (20) is removed, an alternative behavior is effected such as the display of a user option menu. This approach of causing the behavior of the computer to vary upon resource removal in dependence on whether there is a current sustained operation of an input device, can also be applied to other types of removable resources and input devices.Type: GrantFiled: July 3, 1997Date of Patent: October 19, 1999Assignee: Hewlett-Packard CompanyInventor: Vu Frederic
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Patent number: 5968136Abstract: A method for securely accessing a peripheral device at an absolute address is disclosed. A computer program is executed to request from an operating system a memory access object including a procedure executable to address the peripheral device at the absolute address. An operating system procedure is executed to provide the memory access object to the computer program if a value associated with the computer program indicates that the computer program is trusted to perform absolute addressing. If the operating system procedure provides the memory access object to the computer program, the computer program is executed invoke the memory access object procedure to address the peripheral device at the absolute address.Type: GrantFiled: June 5, 1997Date of Patent: October 19, 1999Assignee: Sun Microsystems, Inc.Inventors: Thomas Saulpaugh, David E. Bohman, II
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Patent number: 5964871Abstract: The present invention resolves conflicts in the computer system with one or more devices and one or more system resources and where each of the devices has an existing configuration and one or more acceptable configurations. The devices are represented as one or more objects corresponding to each of the devices. Each object has a move procedure and a fit procedure. The move procedure requests objects representative of other devices to move from their existing configurations, while the fit procedure attempts to fit an acceptable configuration of the object into the system resources. The objects are linked together using a tree structure. When a new or unconfigured device is to be added to the system, the apparatus provides a new or unconfigured object representative of the new or unconfigured device.Type: GrantFiled: March 10, 1997Date of Patent: October 12, 1999Assignee: Compaq Computer CorporationInventors: Garyl L. Hester, Cindy R. McGee, John DeNardo, Kenneth W. Hester
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Patent number: 5964849Abstract: Disclosed is an apparatus for controlling video devices by transmitting RS-422 command strings to the devices comprising, a controller for preparing each RS-422 command string in advance of an execution time at which the command is to be executed; a buffer for storing each RS-422 command string and a respective associated time of execution; and a buffer scanner operable to compare a current time with the execution times of each buffered command and to transmit to the respective video device any commands stored in the buffer for which the associated execution time is the same as or before the current time.Type: GrantFiled: April 1, 1997Date of Patent: October 12, 1999Assignees: Sony Corporation, Sony United Kingdom LimitedInventor: Neil Stuart McLagan
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Patent number: 5961649Abstract: A method of transmitting a signal from a relatively fast clock domain to a relatively slow clock domain is described. The fast and slow clock domains operate according to respective fast and slow clock signals that are substantially synchronized and that have respective frequencies that are non-integer multiples. A first state of an input signal is latched at the commencement of a first period of the fast clock signal, the commencement of the first period of the fast clock signal being substantially coincident with the commencement of a first period of the slow clock signal. In response to the latching of the first state of the input signal, a first output signal is generated and held over the first period, and at least one further period, of the fast clock signal. The first output signal is then latched in the second time domain in response to the commencement of a second period of the slow clock signal, the second period being immediately subsequent to the first period of the slow clock signal.Type: GrantFiled: December 4, 1997Date of Patent: October 5, 1999Assignee: Intel CorporationInventors: Narendra Khandekar, Ashish S. Gadagkar, Robert F. Kubick, Vincent E. VonBokern, Manish Muthal
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Patent number: 5948113Abstract: Centrally handling a runtime error or exception of a program using a central object stack and exception handling code centrally maintained within a global object manager. The global object manager is a data structure separate from the program's call stack. When a modified TRY statement is executed, a location is marked on the central object stack. During execution of a section of code after the modified TRY statement, if a new object is needed, the global object manager efficiently allocates the new object. The global object manager either allocates the new object directly from memory or attempts to re-use a previously allocated object in a cache of available objects as the new object. The new object is then registered on the central object stack and a pointer to the new object is registered on the program's call stack. This keeps the new object and associated exception handling code off the program's call stack.Type: GrantFiled: April 18, 1997Date of Patent: September 7, 1999Assignee: Microsoft CorporationInventors: Eric Wendell Weaver Johnson, Neelamadhaba Mahapatro
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Patent number: 5944820Abstract: A system and method for providing a modifiable partition boot record for a memory device of a computer. The computer includes a processor for loading and running boot code and operating code. The memory device, which can be accessed by the processor, includes at least two partitions, the first partition initially being active and having a type that is not recognized by the operating system code and the second partition initially being inactive. When the computer boots up, the processor first accesses the active partition. Once the active partition has been accessed, the processor then converts the type for the active partition to a visible type, i.e, a type that is recognizable to the operating system code. When the operating system code is loaded, it recognizes the type for the active partition and therefore does not encounter an error. Once the operating system code has been loaded, the processor converts the type for the active partition back to a non-visible type.Type: GrantFiled: October 15, 1997Date of Patent: August 31, 1999Assignee: Dell U.S.A., L.P.Inventor: Alan E. Beelitz
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Patent number: 5944834Abstract: A method of analyzing timing differences for common path pessimism removal for a circuit containing a locked loop which controls at least two legs of a clock tree is provided. The method comprises the steps of computing the early and late mode delays for the locked loop; computing the early and late mode delays for delay segments in the circuit; identifying delay segments in the feedback path which control the locked loop; and adjusting the early and late mode delays for the delay segments in the feedback path based upon the type of feedback control used in the circuit.Type: GrantFiled: September 26, 1997Date of Patent: August 31, 1999Assignee: International Business Machines CorporationInventor: David J. Hathaway
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Patent number: 5938777Abstract: In a computer system having a bus bridge connecting a plurality of system buses, a cycle list based bus cycle resolution checking system and method have been disclosed. Each bus in the system is treated as an individual, persistent object. Various bus cycles on system buses are also modeled as objects. Each bus object is configured to detect an initiation of a corresponding bus cycle. An initiator cycle list for holding bus cycles initiated by bus masters, and a target cycle list for storing bus cycles sent to bus targets are also created. Each cycle list itself is treated as an object. These cycle lists combinedly interact with a bus object to verify resolution of an initiator bus cycle. A stimulator object may provide a bus stimulus to each bus object as well as to each cycle list. The stimulator object may read said bus stimulus from a stimulus file of real or simulated buses. In such a case, bus bridge performance and functionality can be tested through externally simulated bus signals.Type: GrantFiled: July 31, 1997Date of Patent: August 17, 1999Assignee: Advanced Micro Devices, Inc.Inventor: Hamilton B. Carter
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Patent number: 5938740Abstract: A peripheral control device of a computer system having programmable keys for recording frequently used procedures is disclosed. The computer system comprises a computer, a peripheral device connected to the computer, a peripheral control program for controlling the peripheral device, and a peripheral control device for controlling the peripherals of the computer. The peripheral control device comprises control keys for generating peripheral control signals, at least one programmable key for generating an execution signal, and a display device for displaying a message signal. The system further comprises a signal distribution program for transmitting the peripheral control signals to the peripheral control program and transmitting the message signal generated from the peripheral control program to the display device, a script file generation program for generating a script file for a programmable key, and a script file execution program for executing the designated script file.Type: GrantFiled: April 21, 1997Date of Patent: August 17, 1999Assignee: Primax Electronics Ltd.Inventor: Ming-Chih Chang
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Patent number: 5935222Abstract: An arrangement wherein peripheral modules of a decentralized peripheral system connected to an automation unit can be identified. To do so, the peripheral modules of the decentralized peripheral system are equipped with a device that converts a polling signal sent to it into an identification signal during an identification mode. The arrangement can be used in decentralized peripheral systems of programmable control systems.Type: GrantFiled: May 7, 1997Date of Patent: August 10, 1999Assignee: Siemens AktiengesellschaftInventor: Detlev Knauer