Abstract: A switching mode power supply with zero voltage switching is discussed. It adopts a primary control circuit to turn on a primary switch circuit when a current flowing through the primary switch circuit reaches an inverse current threshold or when a variation rate of a voltage signal indicative of a voltage across the primary switch circuit reaches a rate threshold.

Abstract: An integrated circuit includes a plurality of tiles receiving a power supply voltage, each having a corresponding analog circuit and operates in response to a first voltage, and a hardware controller receiving a voltage identification code and provides the first voltage to each of the plurality of tiles in response thereto. The hardware controller comprises a test time controller determining coefficients of a waveform that describes an average correspondence between the power supply voltage and the first voltage for the plurality of tiles, and a boot time controller determining a respective error signal indicating an error between the waveform and a respective actual waveform for each of the plurality of tiles, and providing the respective error signal to the corresponding analog circuit of each of the plurality of tiles. The corresponding analog circuit of each of the plurality of tiles adjusts the first voltage according to the respective error signal.

Abstract: A method provides current limitation in the event of transient voltage variations at an AC output of a multilevel inverter that includes a bridge circuit with a first DC input, a second DC input, a neutral terminal and a bridge output, as well as a line filter with a choke connected between the bridge output and the AC output, and a capacitor connected between the AC output and the neutral terminal. In the method, depending on the voltage at the capacitor, when a first current threshold is exceeded by the choke current, a regular operating mode is interrupted and measures for current limitation are initiated. A multilevel inverter is further disclosed including a control circuit that is configured to carry out such a method.

Abstract: Example implementations include a method of obtaining an input voltage of a power converter circuit and a system voltage of the power converter circuit, obtaining a voltage rate gain based on an aggregate inductance of the power converter circuit, and in accordance with a determination that the input voltage and the system voltage are not equal, generating a rate offset voltage based on the voltage rate gain and the system voltage difference.

Abstract: In a described example, a circuit includes a sensor, a controller and an amplifier. The sensor has a sensor input and a sensor output. The sensor input is adapted to be coupled to a chassis of a switch-mode power supply (SMPS). The controller has an input, a timing output and a level output. The input of the control circuit is coupled to the sensor output. The amplifier has a timing control input, a level control input and an amplifier output. The level control input is coupled to the level output of the controller. The timing control input is coupled to the timing output, and the amplifier output is coupled to the sensor input. The amplifier is configured to provide compensation pulses at the amplifier output having magnitude and timing to reduce common-mode noise on the chassis.

Abstract: A multi-phase voltage converter has a plurality of integrated circuits (ICs), and a controller. Each IC has a control pin to receive a control signal, a monitoring pin and a temperature sensing circuit, the controller has a monitoring pin connected to the monitoring pin of each of the plurality of ICs to receive a monitoring signal. The temperature sensing circuit is connected to or disconnected from the monitoring pin of the corresponding one of the plurality of ICs in response to the control signal and the monitoring signal.

Abstract: A pre-chargeable DCDC conversion circuit includes a high-voltage side conversion module connected to a primary winding of a main transformer T1, a low-voltage side conversion module connected to a secondary winding of the main transformer, and a controller used for controlling the high-voltage side conversion module and the low-voltage side conversion module. A pre-charging module is connected in series in a direct-current bus of the low-voltage side conversion module, and the pre-charging module is used for pre-charging a capacitor of electric equipment connected to a direct-current bus of the high-voltage side conversion module when the complete machine is powered on. The pre-charging module and a forward DCDC share most of power devices and power loops, and only a small number of devices are added, such that the volume and cost are reduced compared with an independent pre-charging branch, and the control mode is simple.

Abstract: A bias circuit is provided. The bias circuit may include a first transistor forming an input node, a second transistor forming an output node, and a switch array disposed between the first transistor and the second transistor. The switch array may be configured to charge the first transistor to a supply voltage and the second transistor to a ground during a first mode of operation, and couple the first transistor to the second transistor to approximate a final bias voltage during a second mode of operation.

Abstract: A secondary side controller of a flyback AC-DC converter includes an integrated circuit, which includes: an analog-to-digital converter (ADC) coupled to a voltage bus (VBUS), the ADC to output a digital value corresponding to a voltage level of the VBUS; first logic configured to generate a reference voltage based on the digital value; second logic configured to generate a VBUS gain value based on output power of a flyback transformer of the flyback AC-DC converter; an integrator to accumulate current corresponding to a sensed voltage at a drain of a synchronous rectifier (SR) of a secondary side of the flyback transformer, the accumulated current to be modified according to the VBUS gain value, wherein the integrator outputs an updated sensed voltage; and a comparator to output a detection signal, indicative of a negative sense voltage, in response to the updated sensed voltage matching the reference voltage.

Abstract: A quasi-resonant auto-tuning controller includes a zero-voltage crossing detection circuit and a valley tuning finite-state machine having a look-up table. The zero-voltage crossing detection circuit receives a reference voltage and receives an auxiliary signal from an auxiliary winding. The zero-voltage crossing detection circuit produces a comparison signal having pulses when the auxiliary signal is less than the reference voltage. The valley tuning finite-state machine produces a divided pulse width based on the comparison signal, stores the divided pulse width of each pulse in the look-up table, determines, from the comparison signal, that the auxiliary signal is less than the reference voltage, waits a time period corresponding to the divided pulse width stored in the look-up table if the auxiliary signal is less than the reference voltage, and produces a valley point signal after waiting the time period.

Abstract: A method and a control circuit for driving an electronic switch coupled to an inductor in a power converter in successive drive cycles each including an on-time and an off-time are disclosed. Driving the electronic switch includes: measuring an inductor voltage during the on-time in a drive cycle in order to obtain a first measurement value; measuring the inductor voltage during the off-time in a drive cycle in order to obtain a second measurement value; obtaining a first voltage measurement signal that is dependent on a sum of the first measurement value and the second measurement value; and adjusting the on-time in a successive drive cycle dependent on a feedback signal and the first voltage measurement signal.

Abstract: The present disclosure provides a three-phase AC/DC converter aiming for low input current harmonic. The converter includes an input stage for receiving a three-phase AC input voltage, an output stage for at least one load, and one or more switching conversion stages, each stage including a plurality of half bridge modules. The switches in each module operate with a substantially fixed 50% duty cycle and are connected in a specific pattern to couple a DC-link and a neutral node of the input voltage. The AC/DC converter further includes one or more controllers adapted to vary the switching frequency of the switches in the switching conversion stages based on at least one of load voltage, load current, input voltage, and DC-link voltage. The converter can also include one or more decoupling stages, such as, inductive components adapted to decouple the output stage from the switching conversion stages.

Abstract: A Hybrid DC-DC switching converter architecture is described. The Hybrid architecture includes a capacitive converter cascaded by an inductive converter for a boost switching converter, and an inductive converter cascaded by a capacitive converter for a buck switching converter. A capacitor at an intermediate node and a switch in the capacitive converter are removed. Reducing the switching converter by one switch and one capacitor results in a smaller implementation area. A single regulation circuit and an inductor with a smaller saturation current (Isat) are used.

Abstract: Methods and systems include identifying an abnormal condition in a PFC circuit comprising an input configured to be coupled to a 3-phase power source and to receive input 3-phase power from the 3-phase power source, a bus having a plurality of bus lines, each bus line configured to be coupled to the input and to carry one phase of the input 3-phase power, a PFC leg including a contactor configured to selectively couple a capacitor bank included in the PFC leg to the bus. In response to identifying the abnormal condition, the contactor is controlled to decouple the capacitor bank from the bus, and after a reset button has been activated, the contactor is recoupled to the capacitor bank to resume operating the PFC leg to provide power factor correction to the input 3-phase power.

Abstract: A resonant switching power converter includes: capacitors, switches, at least one charging inductor, at least one discharging inductor and a pre-charging circuit. The pre-charging circuit controls a first switch of the switches when the resonant switching power converter operates in a pre-charging mode, to control an electrical connection relationship between the input voltage and a first capacitor of the capacitors and to control other capacitors of the capacitors, thus controlling the capacitors to be connected in parallel to one another or to be connected in series to one another, so that when a voltage drop across the first capacitor is lower than a predetermined voltage, the voltage drop across each capacitor is charged to the predetermined voltage. After operating in the pre-charging mode, the resonant switching power converter subsequently operates in a resonant voltage conversion mode, to thereby convert an input voltage to an output voltage.

Abstract: Technologies for alternating current regulation controller include a controller configured to determine a voltage duty cycle based on a target voltage, and to determine a delay time based on the voltage duty cycle. The controller is coupled to input phases of an alternating current generator having multiple phases. Each phase is coupled to a silicon controlled rectifier. For each phase, the controller identifies a rising edge asserted on the input phase, waits the delay time after identifying the rising edge, and asserts an output pulse on an output driver coupled to the silicon controlled rectifier coupled to the input phase in response to waiting the delay time. Other embodiments are described and claimed.

Abstract: A method for operating a multi-level bridge power converter of an electrical power system connected to a power grid includes providing a plurality of switching devices of the power converter in one of a neutral point clamped topology or an active neutral point clamped topology, the plurality of switching devices including a first group and a second group of switching devices. The method also includes providing a multi-state deadtime for the first and second groups of switching devices that changes based on different state transitions of the power converter. Further, the method includes operating the first and second groups of switching devices according to the multi-state deadtime to allow the first group to switch differently than the second group during the different state transitions, thereby decreasing voltage overshoots on the first group during one or more of the different state transitions and providing safe transition between commutation states of the power converter.

Abstract: An input voltage estimate circuit for use in a power converter. The input voltage estimate circuit comprises a timer, which comprises a timer control circuit to generate a control signal in response to a request signal, a winding signal, and an output voltage signal. The control signal is coupled to transition to a first logic level in response to a request event in the request signal, and to transition to a second logic level in response to the winding signal falling below the output voltage signal. The timer comprises a primary conduction timer to generate a primary conduction time signal in response to the first logic level and the second logic level in the control signal and a secondary conduction timer to generate a secondary conduction time signal in response to the second logic level in the control signal and a second logic level in a second drive signal.

Abstract: The invention relates to a signal amplifier circuit for amplifying a signal, in particular an audio amplifier circuit, includes at least one first amplifier transistor (Q1) and at least one second amplifier transistor (Q2), wherein the first amplifier transistor (Q1) and the second amplifier transistor (Q2) are connected to one another in a push-pull circuit and are fed by an amplifier voltage source (V+, V?); and one or more bias diodes (D1, D2) thermally coupled in each case to an associated amplifier transistor (Q1, Q2), wherein the bias diodes (D1, D2) are arranged in a parallel connection with respect to the amplifying transistors (Q1, Q2) to reduce or avoid a crossover distortion, wherein the bias diodes (D1, D2) are fed at least partly by a voltage source (UA) which is independent of the amplifier voltage source (V+, V?).

Abstract: This disclosure provides an integrated transformer and a power converter, the integrated transformer includes: a magnetic core, including an upper cover, a lower cover, a first winding column and a second winding column; a printed wiring board, disposed between the upper cover and the lower cover, and including a first through hole corresponding to the first winding column and a second through hole corresponding to the second winding column; and a first winding, a second winding, a third winding and a fourth winding; the first winding and the third winding are wound on the first winding column and the second winding column respectively, the second winding and the fourth winding are provided at positions corresponding to the first through hole and the second through hole on the printed wiring board, and magnetic flux directions within the first winding column and the second winding column are opposite.