Patents Examined by Adolf Deneke Berhane
  • Patent number: 6445600
    Abstract: Modular apparatus for regulating the harmonics of current drawn from power lines by electric equipment, comprising a first rectifier circuit module, consisting of an array of rectifying diodes; a second Switch and Controller Assembly (SCA) module, which comprises a power switch and controller and their interconnections; an input inductor for filtering the current drawn from the rectifier module; and an output capacitor, for filtering the output voltage ripple at the load. The inlet of the rectifier is connected to the power line and an outlet of the rectifier module is connected to the SCA. The inlet of said SCA is connected to the rectifier, via an inductor and the outlet of said SCA is connected to the output capacitor. The inlet of the inductor is connected to the rectifier, the outlet of the inductor is connected to the inlet of said SCA, and the capacitor is connected in parallel with the load.
    Type: Grant
    Filed: January 5, 2001
    Date of Patent: September 3, 2002
    Assignee: Ben-Gurion University of the Negev Research & Development Authority
    Inventor: Shmuel Ben-Yaakov
  • Patent number: 6442053
    Abstract: A circuit arrangement for rectifying alternating current (AC) signals in solid-state technologies that have gain devices with low transconductance. A contemplated circuit uses operational amplifiers connected in feedback mode to enhance the effective transconductance of the gain devices.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: August 27, 2002
    Assignee: International Business Machines Corporation
    Inventors: Sudhir M. Gowda, Scott K. Reynolds
  • Patent number: 6438009
    Abstract: A MOSFET is used as a synchronous rectifier in a fly-back DC/DC converter and connected in series with a secondary winding of a transformer. The MOSFET is repetitively turned on and off in response to the turning off and on of a primary switch connected in series with a primary winding of the transformer. Circuit elements on the secondary winding side detect voltage transients across the MOSFET caused by reverse currents when it is turned off and shorten at least a next on-period of the MOSFET in response to the detection of such transients.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: August 20, 2002
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Bengt Assow
  • Patent number: 6438008
    Abstract: Transient current pulses/spikes generated by switching components of a battery plant are restricted from application to a floating battery, by suppressing circuitry which is connected to the battery terminals but mostly located outside of the main power path train, coupling primary power to the switching circuit. This blocks from the battery transient current pulses/spikes which may over charge the battery during the float charging operation and damage the battery.
    Type: Grant
    Filed: July 29, 1997
    Date of Patent: August 20, 2002
    Inventor: Yehoshua Mandelcorn
  • Patent number: 6437545
    Abstract: A DC/DC converter (10; 30; 40; 50; 60), comprising inductive energy storage means (2), switching means (S0-S7) and control means (9; 31; 41; 51; 61), wherein said control means (9; 31; 41; 51; 61) are arranged for selectively operating said switching means (S0-S7) for providing electrical energy from said energy storage means (2) to an output (A; B; C; D) of said DC/DC converter (10; 30; 40; 50; 60) in both a Pulse Width Modulation (PWM) mode and a Pulse Frequency Modulation (PFM) mode switching cycle.
    Type: Grant
    Filed: July 5, 2001
    Date of Patent: August 20, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Ferdinand Jacob Sluijs
  • Patent number: 6438003
    Abstract: A switched mode controller for properly handling an under-voltage condition in a power line which includes a current mirror for receiving current from the power line; a reference current source coupled to the current mirror for supplying a reference current; and a power transistor coupled to the reference current source, the power transistor generating a pulse width modulated signal when current from the power line exceeds the reference current, the power transistor being disabled when current from the power line is less than the reference current.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: August 20, 2002
    Assignee: Power Integrations, Inc.
    Inventors: Balu Balakrishnan, Alex Dienguerian, Leif Lund
  • Patent number: 6437999
    Abstract: PWM DC to DC converter circuits which accomplish ripple cancellation at one or more terminals are revealed. Four or more inductors are required in each case, however, in all cases multiple inductors can be combined into a single simple coupled inductor to accomplish the ripple cancellation. Some of the circuits revealed accomplish ripple cancellation at all terminals and some also provide zero voltage switching and galvanic load isolation. The non-isolated DC to DC converter networks revealed accomplish buck, boost, buck boost (flyback), buck complement, boost complement, or flyback complement conversion using a simple circuit requiring only two switches, one of which may be a simple diode rectifier, two or more capacitors, and four or more inductors, which may be co-located on a single common magnetic core. The isolated converters revealed provide continuous and discontinuous forward converter and continuous flyback converter transfer functions.
    Type: Grant
    Filed: May 12, 2001
    Date of Patent: August 20, 2002
    Assignee: Technical Witts, Inc.
    Inventor: Ernest H. Wittenbreder
  • Patent number: 6433525
    Abstract: A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: August 13, 2002
    Assignee: Intersil Americas Inc.
    Inventors: Volodymyr A. Muratov, Robert G. Hodgins, Thomas A. Jochum
  • Patent number: 6434021
    Abstract: Various three, four and five terminal power supply control packages for controlling delivery of power from a source to a load in both single and dual switch transformer coupled power converters are disclosed. By way of example, a three-terminal control package has a first terminal for coupling to a primary winding of a transformer, a second terminal for coupling to a ground reference and a third terminal for coupling to a source of operating power. An internal power switch has an input coupled to the first terminal, an output coupled to the second terminal, and an activation gate. The package includes pulse train control circuitry coupled to the power switch activation gate and responsive to an error signal for driving the power switch, the error signal derived from an internally generated compensation signal corresponding to an expected voltage loss between the source and the load.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: August 13, 2002
    Assignee: iWatt
    Inventors: Arthur J. Collmeyer, Mark D. Telefus, Dickson T. Wong, David B. Manner
  • Patent number: 6433521
    Abstract: The present invention provides a regulator used in an active terminator of a bus. The regulator comprises a voltage-regulated terminal, a first operational amplifier and a non-inverting input terminal thereof coupled to a reference voltage. An inverting input terminal of a second operational amplifier is coupled to the reference voltage. A control gate of a first transistor is coupled to an output terminal of the first operational amplifier. A source of the first transistor is coupled to an inverting input terminal of the first operational amplifier to form a feedback network and to provide a stable circuit of sourcing current. A control gate of a second transistor is coupled to an output terminal of the second operational amplifier and a drain of the second transistor to a non-inverting input terminal of the second operational amplifier to form the feedback network and to provide a stable circuit of sinking current.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: August 13, 2002
    Assignee: Windbond Electronics Corporation
    Inventors: An-Tung Chen, Yung-Peng Hwang
  • Patent number: 6433527
    Abstract: The present invention offers a low cost, reliable, on chip implementation that takes advantage of the nature of the average current mode topology to detect phase failures within a multi-phase system. The invention further includes sensing average current to the load, generating error voltages and changing duty cycles when the sensed load current is not at the desired level.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: August 13, 2002
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Mansour Izadinia, Hendrik Santo
  • Patent number: 6434032
    Abstract: An L-shaped bracket is affixed to one side of a portable battery (40). One leg of the bracket extends outwardly from the side of the battery and carries a pair of receptacles (46 and 48), one for transmitting operating and/or recharging power to the external, DC powered device and the other for transmitting recharging power to the portable battery. A carrying case (10) of heavy fabric has a plurality of compartments for diverse articles. The battery, with bracket and receptacles is mounted, preferably permanently, in an internal compartment which must be opened in order to gain access to the receptacles for insertion and removal of plugs (64). The battery is positioned in a pocket having an upper edge flush with the leg of the bracket carrying the receptacles and an upper portion of the battery extends above the pocket.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: August 13, 2002
    Assignee: Philip D. Anderson
    Inventor: James P. Romano
  • Patent number: 6429624
    Abstract: A charging circuit for rectifying an alternating-current voltage and for charging an electrical charge into a charging element includes first and second switching units, in which, according to a terminal voltage at one of respective input terminals to which an AC voltage is supplied, it is controlled whether or not the other one of the input terminals and a first power supply line are connected; first and second diodes which are connected between the respective input terminals and a second power supply line; and a charging element connected between the first and second power supply lines, and it is configured to detect a charging voltage of the charging element, compare the detected charging voltage with a reference voltage that is defined in advance, and supply a generator current that flows into one of the input terminals to the other one of the input terminals through a path that does not pass through the first and second diodes when the charging voltage exceeds the reference voltage, so that a circuit can
    Type: Grant
    Filed: January 5, 2000
    Date of Patent: August 6, 2002
    Assignee: Seiko Epson Corporation
    Inventor: Teruhiko Fujisawa
  • Patent number: 6429634
    Abstract: A voltage boosting device for speeding power-up of multilevel nonvolatile memories, including a voltage regulator and a charge pump and having an output terminal; the voltage regulator having a regulation terminal connected to the output terminal, and an output supplying a control voltage; the read charge pump having an output connected to the output terminal and supplying a read voltage. The device further includes an enable circuit connected to the output and having a pump enable output connected to a charge pump enable terminal and supplying a pump enable signal. The pump enable signal is set at a first logic level so as to activate the charge pump when the read voltage is lower than a nominal value. In addition, the device generates a power-up sync signal which activates a read operation when the read voltage reaches its nominal value and a chip enable signal is set at an active value.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: August 6, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Paolo Rolandi, Massimo Montanaro, Giorgio Oddone
  • Patent number: 6430063
    Abstract: A primary side of a transformer has a switching transistor to on-off control the current flowing in a primary winding on a primary side. A secondary side of the transformer has a commutating side FET to be turned on by applying the induced voltage of a tertiary winding on a secondary side of a current transformer, and a flywheel side FET with the primary winding on the primary side of the current transformer connected thereto in series. The current transformation ratio of the current transformer is small in the initial period when the flywheel side FET is turned on, and then, the current transformation ratio is increased by current controlling means comprising a saturable reactor, a diode or the like.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: August 6, 2002
    Assignee: Fujitsu Denso Ltd.
    Inventors: Katsuhiko Nishimura, Kazuo Kobayashi, Yoshiki Kubota
  • Patent number: 6426884
    Abstract: A converter with synchronous rectification is driven in such a way so that the reverse currents do not build up and cause damage to or limit the efficiency of the circuit. Negative currents are self-adjusted to a very small percentage of load current, so the converter will not have problems when in parallel with other modules. An auxiliary winding is used to allow an output inductor to drive the secondary side rectifiers thereby limiting their conduction time as reverse currents increase. The primary side conduction times are extended by operation of their anti-diodes so that reverse currents are limited naturally without the use of dedicated load sensing and shutdown circuits.
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: July 30, 2002
    Assignee: Ericsson, Inc.
    Inventor: Mark N. Sun
  • Patent number: 6426883
    Abstract: An apparatus and method for reducing power loss due to switching of a switch mode power converter includes a power converter having a plurality of switch assemblies, each connected in parallel through an inductor to a common output node and a diode connected to a second common output node, and a switch controller for activating and deactivating the plurality of switch assemblies during successive switching cycles. The controller activates and deactivates each switch assembly one time during each switching cycle and activates one subset of switch assemblies before activating the remaining switch assemblies. The switch controller provides enable signals to commute the subset of switch assemblies among the plurality of switch assemblies to be activated before the remaining switch assemblies. The switch controller includes a modulator for modulating a clock signal and demand signal, and at least one delay circuit for providing a signal which is delayed in time relative to the modulated signal.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: July 30, 2002
    Assignee: Harman International Industries, Incorporated
    Inventor: Gerald R. Stanley
  • Patent number: 6426611
    Abstract: A power control system and method of power control, the system consists of a power transformer having a primary portion and a secondary portion and a wiring run having a length and coupled at one end to the secondary portion. Also included is a constant voltage controller coupled to another end of the wiring run. The constant voltage controller receives an input power signal from the power transformer and outputs an output power signal at a specified voltage level to a plurality of low voltage electrical loads. The input power signal is at a higher voltage level than the specified voltage level and the output power signal is maintained at the specified voltage level regardless of a change in a voltage drop of the power control system. In preferred embodiments, the system uses low power logic rectifiers to rectify AC power signals to provide reset, current feedback and voltage feedback signals.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: July 30, 2002
    Inventors: John R. Reeves, Randy Weisser
  • Patent number: 6424131
    Abstract: The object of the present invention is, in a power control device including an auxiliary circuit that is connected in parallel to an output circuit and controls an adjusting current smaller by a substantially constant ratio than an output current, to control the ratio of the output current to the adjusting current at a constant level by controlling the output circuit and the auxiliary circuit so that the potentials of the corresponding terminals agree with each other. As a means for attaining the object, the power control device comprises a bridge of four branches including an output circuit, an auxiliary circuit, a load, and either of a current detector or a current setting circuit.
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: July 23, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasunori Yamamoto, Shinji Tanaka, Minoru Miyake
  • Patent number: 6424546
    Abstract: Universal switched power converter having a transformer that comprises a first winding (11-3) divided into two parts and having an intermediate tap (11-3-1), and a second winding (11-9) connected in cascade with rectifier means (12) and filter means (13), so that a first current flows through the part of said first winding (11-3) comprised between the end of the primary winding (11-3) connected to a first input terminal (11-1) and the intermediate tap (11-3-1) and through a second switching element (11-6) connected to the intermediate tap (11-3-1) and to a second input terminal (11-2), when the input voltage applied across the input terminals (11-1, 11-2) is close to a first predetermined voltage value and the second switching element (11-6) is in a conducting state.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: July 23, 2002
    Assignee: Alcatel
    Inventors: Mercedes Rivas Saiz, Antonio Julian Huertas Blazquez, Jose Andres Navas Sabater, Jaime de la Peña Llerandi