Abstract: A multiphase DC-DC converter includes a first phase circuit including a higher inductance inductor and a second phase circuit including a lower inductance inductor. An output of the inductors are tied together providing a Vout. A phase manager and current sharing (PMCS) block receives a feedback signal from a feedback network coupled between Vout and the PMCS block that receives current feedback from phase circuits. The PMCS block generates driver control signals at a first time when a load is requesting a lower load current for controlling the phase circuits to operate with a first current sharing ratio to provide the lower load current, and at a second time when the load is requesting a higher load current controls the phase circuits to operate at a second current sharing ratio that is different from the first current sharing ratio having a higher average second phase circuit current.

Abstract: A voltage regulator circuit having an internally compensated effective series resistance includes a control circuit to generate an out current at a regulated output voltage based on a reference voltage. The control circuit includes an amplifier, a resistive element to feedback output voltage to an input of the amplifier, and a compensation circuit to couple the internally compensated effective series resistance into the control circuit. The compensation circuit includes a first current sense device to generate a first sensed current proportional to a current through an N-type pass device, a second current sense device arranged to generate a second sensed current proportional to the current through the N-type pass device, and a bias circuit coupled to sink the first sensed current and the second sensed current to reduce a bias voltage across the resistive element below a threshold voltage.

Abstract: A current sensing circuit used in a buck-boost converter having a pair of buck switches and a pair of boost switches, including: a first sensing circuit providing a detection current though a first normally-ON transistor and a second normally-ON transistor, and a second sensing circuit detecting an average of the detection current and providing a current sensing signal in accordance with the average. During a turn ON time of a first low side switch of the pair of buck switches, the detection current represents a current flowing through the first low side switch, the current sensing signal represents an output current. During a turn ON time of the second low side switch of the pair of boost switches, the detection current represents a current flowing through the second low side switch, and the current sensing signal represents an input current.

Abstract: A power converter for converting an input power at an input of the converter to an output power at an output of the converter includes a power conversion circuit and a snubber circuit coupled to the power conversion circuit. The power conversion circuit includes a switching device coupled to a reference potential, and an inductance coupled to the switching device. The snubber circuit includes a snubber switching device, a capacitance coupled to the snubber switching device, and an auxiliary inductance coupled to the inductance of the power conversion circuit and the snubber switching device. The snubber switching device and the capacitance are coupled across the switching device of the power conversion circuit. The capacitance is adapted to store leakage energy output from the power conversion circuit and discharge at least a portion of the stored leakage energy via the snubber switching device. Other example power converters are also disclosed.

Abstract: A power converter determines a feedback signal according to a voltage signal related to an output voltage of the power converter and a reference voltage, thereby regulating the output voltage. A control circuit and method for programming the output voltage of the power converter utilize an offset current generator to inject a current or sink a current for changing the voltage signal or the reference signal, thereby adjusting the output voltage. As a result, it gets rid of complicated circuitry but provides more steps adjustment, which reduces related costs.

Abstract: A method and apparatus for secondary side current mode control of a converter are provided. In the method and apparatus, an output voltage of the converter is detected, where the converter has primary and secondary windings that are galvanically isolated in respective primary and secondary sides. A secondary control signal is generated in the secondary side based at least in part on the output voltage and a reference voltage. The secondary control signal is converted to a primary control signal provided in the primary side. The converter is driven in the primary side based at least in part on the primary control signal and a current sense signal indicative of a current flowing through the primary winding.

Abstract: A direct current (DC) to DC power converter includes a first bus converter for converting a first DC bus voltage into a first high frequency AC voltage and a second bus converter for converting a second high frequency alternating current (AC) voltage into a second DC bus voltage. The DC to DC converter also includes a resonant circuit for coupling the first bus converter and the second bus converter and a controller for providing switching signals to the first bus converter and the second bus converter to operate the power converter in a soft switching mode. The controller includes a switching frequency controller for determining a switching frequency signal for the power converter based on a reference output current and a phase shift controller for determining a phase shift signal for the power converter.

Abstract: Systems and methods are provided for regulating a power converter. An example system controller includes: a first controller terminal configured to output a drive signal to a switch to affect a current flowing through a primary winding of a power converter, the drive signal being associated with a switching period corresponding to a switching frequency; and a second controller terminal configured to receive a feedback signal associated with an output voltage related to a secondary winding of the power converter. The first controller terminal is further configured to: output the drive signal to close the switch during the on-time period; and output the drive signal to open the switch during the off-time period. The system controller is configured to set the switching frequency to one or more frequency magnitudes, each of the one or more frequency magnitudes being smaller than or equal to an upper frequency limit.

Abstract: An overcurrent protection apparatus that protects, from overcurrent, a load drive system including a load circuit having an electric load and a semiconductor switch electrically connected to the load circuit so as to control a drive of the load circuit is provided. The overcurrent protection apparatus includes: an energization state acquisition part that is configured to acquire an energization state of load current flowing through the semiconductor switch and the load circuit when the semiconductor switch is ON; a change part that is configured to change an acquisition condition of the energization state at the energization state acquisition part in accordance with a driving state of the load circuit; and a protection operator that is configured to execute overcurrent protective operation of protecting the load drive system from the overcurrent based on the energization state acquired by the energization state acquisition part.

Abstract: A method of monitoring a power factor correcting (PFC) power supply is provided. The method includes: powering on the PFC power supply with a constant current; starting a runtime counter that increments a count value; measuring an output voltage; calculating an output power by multiplying the constant current by the output voltage; storing the output power in a random-access memory (RAM); calculating an input power by multiplying the output power by an efficiency curve factor; and storing the input power in the RAM.

Abstract: Ideal switch bridgeless PFC topologies are presented with the purpose of increasing the efficiency in power factor correction circuits and inverter applications. The topology also leverages the new GaN switches that are available. This patent offers also a very good solution for the Zero crossing distortion problem improving greatly the THD both in power factor correction and inverter applications.

Abstract: In a power management device, a hiccup mode is implemented by using, for example, a counter to count the number of cycles for which a current limiting event has occurred and forcing the power management device to hiccup when a certain number of current limiting events have been counted. A soft start circuit is typically employed to ramp up the output voltage when the power management device is turned back on. By resetting the soft start voltage to the feedback voltage of the load of the power management device upon the first detection of a current limiting event, hiccup can be avoided because resetting the soft start voltage to the feedback voltage will reduce the current in proceeding cycles thereby avoiding additional current limiting events.

Abstract: Controller and method for a power converter. For example, the controller includes a first controller terminal coupled to a gate terminal of a transistor. The transistor further includes a drain terminal and a source terminal, and the first controller terminal is at a first voltage as a first function of time. Additionally, the controller includes a second controller terminal coupled to the source terminal. The second controller terminal is at a second voltage as a second function of time. Moreover, the controller includes a third controller terminal coupled to a first resistor terminal of a resistor. The resistor further includes a second resistor terminal, and the third controller terminal is at a third voltage as a third function of time. Also, the controller includes a fourth controller terminal coupled to a first capacitor terminal of a capacitor.

Abstract: A buck switching regulator includes: a power stage, which includes: an upper-gate switch, a lower-gate switch and an inductor, connected with one another at a switching node; and a supply control switch, controlling the power supply form an output terminal to a load. An overvoltage protection method includes the following steps: (A) sensing a voltage of the switching node, to obtain a switching node voltage; (B) determining whether an overvoltage event occurs in the switching node voltage; and (C) if it is determined yes in the step (B), outputting a protection signal. An overvoltage event is determined directly according to the switching node voltage, not directly according to the output voltage.

Abstract: A synchronous rectifier circuit used in a switching power supply apparatus that performs synchronous rectification includes a transistor and a secondary control IC. The transistor performs switching operation in accordance with a gate voltage applied to a gate terminal. The secondary control IC includes a terminal and applies the gate voltage to the gate terminal of the transistor. The terminal is connected to a capacitor which stores electric charge to be supplied to the gate terminal of the transistor. The terminal is applied with a direct-current voltage obtained through synchronous rectification. The direct-current voltage is equal to or smaller than a withstand voltage of the gate of the transistor, and equal to or larger than a threshold voltage of the transistor. A maximum value of the gate voltage is the direct-current voltage.

Abstract: An electronic system includes a multiple POL regulators that supply a regulated voltage to a component within the electronic system. A phase spreading scheme may be implemented so that the POL regulators operate under various phases to reduce voltage noise, high input capacitance, and high radiated emissions. One phase spreading scheme includes a single POL regulator controlling phase spreading so that the other POL regulators operate under different phases. Another phase spreading scheme includes an upstream POL regulator determining a phase offset that may be passed to a downstream POL regulator so that the downstream POL regulator may operate under a different phase relative to the upstream POL regulator.

Abstract: A converter includes first and second input terminals and first and second output terminals. The converter also includes an output capacitor coupled between the first output terminal and the second output terminal, and a magnetic component having two input terminals and three output terminals. A first output terminal of the magnetic component is coupled through a first electronic switch to the second output terminal of the converter, a second output terminal of the magnetic component is coupled to the first output terminal of the converter, and a third output terminal of the magnetic component is coupled through a second electronic switch to the second output terminal of the electronic converter. In addition, the converter includes a switching stage configured to transfer current pulses from the first input terminal and the second input terminal of the converter to the two input terminals of the magnetic component.

Abstract: System and method for regulating a power converter. The system includes a first signal processing component configured to receive at least a sensed signal and generate a first signal. The sensed signal is associated with a primary current flowing through a primary winding coupled to a secondary winding for a power converter. Additionally, the system includes a second signal processing component configured to generate a second signal, an integrator component configured to receive the first signal and the second signal and generate a third signal, and a comparator configured to process information associated with the third signal and the sensed signal and generate a comparison signal based on at least information associated with the third signal and the sensed signal.

Abstract: A step down convertor with a distributed driving system. In one embodiment, an apparatus is disclosed that includes an inductor coupled to an output node. The apparatus also includes first and second circuits. The first circuit can transmit current to the output node via the inductor, and the second can transmit current to the output node via the inductor. The apparatus also includes a third circuit for modifying operational aspects of the first circuit or the second circuit based on a magnitude of current flowing through the inductor.

Abstract: A rectifier device is described herein. In accordance with one exemplary embodiment, the rectifier device includes a semiconductor substrate doped with dopants of a first doping type and at least one well region arranged in the semiconductor substrate and doped with dopants of a second doping type. Accordingly, the at least one well region and the surrounding semiconductor substrate form a pn-junction. The rectifier device further includes an anode terminal and a cathode terminal connected by a load current path of a first MOS transistor and a diode connected parallel to the load current path. An alternating input voltage is operably applied between the anode terminal and the cathode terminal. The rectifier device further includes a control circuit and a biasing circuit. The control circuit is configured to switch on the first MOS transistor for an on-time period, during which the diode is forward biased.