Patents Examined by Ahn D. Mai
  • Patent number: 10468479
    Abstract: A semiconductor device includes a semiconductor body, which includes transistor cells and a drift zone between a drain layer and the transistor cells. The drift zone includes a compensation structure. Above a depletion voltage a first output charge gradient obtained by increasing a drain-to-source voltage from the depletion voltage to a maximum drain-to-source voltage deviates by less than 5% from a second output charge gradient obtained by decreasing the drain-to-source voltage from the maximum drain-to-source voltage to the depletion voltage. At the depletion voltage the first output charge gradient exhibits a maximum curvature.
    Type: Grant
    Filed: May 14, 2014
    Date of Patent: November 5, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Armin Willmeroth, Franz Hirler, Bjoern Fischer, Joachim Weyers
  • Patent number: 7176546
    Abstract: A diode circuit includes a pin diode structure, wherein the n-semiconductor layer is a buried layer, on which the i-area is deposited by an epitaxy method, and wherein a p-semiconductor layer is introduced into the epitaxy layer. A contacting of the p-semiconductor layer and a contacting of the n-semiconductor layer are arranged on the same main surface of the semiconductor substrate so that an integration with an integrated capacitor, an integrated resistor and/or an integrated inductor is possible.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: February 13, 2007
    Assignee: Infineon Technologies AG
    Inventors: Carsten Ahrens, Wolfgang Hartung, Holger Heuermann, Reinhard Losehand, Josef-Paul Schaffer