Patents Examined by Alan Stewart
  • Patent number: 9257915
    Abstract: A bridge rectifier circuit has first to fourth diode groups which are bridge-connected and each include a main diode and sub-diodes being enabled to be respectively connected in parallel to the main diode, first and second input terminals to which AC power is supplied, a first output terminal connected to the first input terminal via the first diode group and connected to the second input terminal via the second diode group, a second output terminal connected to the first input terminal via the third diode group and connected to the second input terminal via the fourth diode group, and a control circuit configured to detect a current flowing through at least one diode group and increases the number of sub-diodes connected in parallel to the main diode of the diode group through which the detected current flows in accordance with an increase in the detected current.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: February 9, 2016
    Assignee: SOCIONEXT INC.
    Inventors: Hideta Oki, Yukinori Maekawa
  • Patent number: 9240717
    Abstract: Provided is a switching power source device in which fluctuation of the switching frequency can be suppressed without impairing the advantages of a non-linear control system. A switching power source device is provided with: switching control units of non-linear control type that generate an output voltage (out) from an input voltage (IN) by performing ON/OFF control of switching elements in accordance with the results of comparing a feedback voltage (FB) and reference voltage (REF); and an ON time setting unit that monitors switching voltage (SW) appearing at one end of the switch terminals, and sets the ON time (Ton) of the switching element in the switching control units based on the duty of the switching voltage (SW).
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: January 19, 2016
    Assignee: Rohm Co., Ltd.
    Inventors: Hideo Hara, Yoshio Higashida, Kazuhiro Murakami
  • Patent number: 9190910
    Abstract: According to one embodiment, the power circuit includes a first feedback loop which feedbacks information on an output voltage and a second feedback loop which feedbacks information on a load current. When the load current is smaller than a predetermined threshold value, the second feedback loop is blocked and a PWM signal is generated using data of a feedback current signal which is stored before blocking the second feedback loop.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: November 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Chen Kong Teh
  • Patent number: 9160227
    Abstract: An electronic apparatus is removed from a power supply apparatus and that can be certified by detecting a secondary-side transformer coil by a no-load detecting unit. The no-load detecting unit is configured to turn off an output switch unit and a power factor correction and pulse width modulation controller. An intermittent driving unit is configured to drive a start unit once a pre-determined time. The start unit is configured to drive the power factor correction and pulse width modulation controller. A load detecting unit is configured to detect that the electronic apparatus is connected to the power supply apparatus. The load detecting unit is configured to drive the intermittent driving unit. The intermittent driving unit is configured to drive the start unit. The start unit is configured to drive the power factor correction and pulse width modulation controller.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: October 13, 2015
    Assignee: Chicony Power Technology Co., Ltd.
    Inventor: Fu-Chuan Chen
  • Patent number: 9160243
    Abstract: In a control circuit that controls an interleaved power supply, a clock generator generates a clock pulse having a predetermined frequency. A signal doubler generates a master switch on-interval pulse signal indicating information concerning an on-interval of the master switch based on the clock pulse and a master drive pulse signal that drives the master switch, and generates a doubled duty pulse signal having a duty that is double that of the master switch on-interval pulse signal. An edge pulse generator generates a first edge pulse signal based on the master drive pulse signal, and generates a second edge pulse signal based on the doubled duty pulse signal. A slave drive pulse signal generator generates, based on the first and second edge pulse signals, a slave drive pulse signal that drives the slave switch so that an on-interval of the slave switch is identical to that of the master switch.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: October 13, 2015
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Shinya Iljima, Hideyuki Ono, Kenichi Kubota
  • Patent number: 9093899
    Abstract: A control circuit in a PFM/PWM boost switching regulator includes a timer based PFM exit control circuit configured to receive a first control signal for controlling a main power switch, a zero-cross signal indicative of an inductor current having reached zero current value, and a timer reference signal indicative of a timer threshold duration. The timer based PFM exit control circuit assesses an idle time of the inductor current based on the first control signal and the zero-cross signal. The timer based PFM exit control circuit asserts the PFM exit signal in response to the idle time decreasing below a level being equal to or less than the timer threshold duration, and the boost switching regulator transitions out of the PFM mode and into the PWM mode in response to the PFM exit signal being asserted.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: July 28, 2015
    Assignee: Micrel, Inc.
    Inventors: Vinit Jayaraj, Jayant Rao