Abstract: A data and clock recovery phase locked loop circuit comprises a data transition detector block to detect transitions of random input data and to produce a window signal. A delay block delays the random input data to produce delayed random input data. A phase comparator block is connected to the delay block and compares phase of the delayed random input data with phase of a feedback signal to produce a phase compared signal. A charge pump block is connected to the phase comparator block and produces output voltage in response to the phase compared signal. A filter block is connected to the charge pump block to filter the output voltage into DC voltage. A voltage controlled oscillator is connected to the filter block to generate the clock signal which has a frequency depending on the DC voltage.

Abstract: A spectrum analyzer having an improved local oscillator for use in a digital step sweep is capable of minimizing a dynamic spurious response which is inverse proportional to a unit step time in the step sweep. The local oscillator includes a random clock delay which provides a random clock to a direct digital synthesizer to incorporate random timings in a time length of the unit step time for sweeping the local oscillator. In another aspect, the local oscillator includes a sweep step number control which maximizes the number of steps in the step sweep to ultimately decrease the dynamic spurious response.

Abstract: Variable rate data transmissions are accommodated having BRI transmitted in the same frame as the data itself. When Walsh code spreading is employed, the despreading process can be split into two separate despreading operations, with buffering between the two operations. Buffering is made of the intermediate symbols between the despreading stages, and can be made at the maximum user data rate instead of the much higher chip rate. In this way, the size of the buffer in the receiver can be significantly reduced.

Abstract: The present invention relates to a method for setup of a signal in multicarrier modulation, including clipping the signal, in amplitude, with respect to a threshold value, and of reinjecting, with a delay and on the signal to be set up, a clipping noise redistributed, at least partly, outside the useful slip of the signal in multicarrier modulation.

Abstract: Signal transmission and reception device for a new wiring system, is disclosed, in which a plurality of different signals are transmitted at a time between a plurality of function blocks in an integrated circuit through one signal transmission line, for reducing area occupied by wiring, including one signal transmission line fitted between the function blocks for transmission of signals, a driving circuit for receiving signals from the function blocks through a plurality of internal signal lines, converting combinations of transitions of the signals into encoded signals, and providing the encoded signal to the signal transmission line, and a reception circuit for receiving the encoded signal transmitted from the driving circuit through the signal transmission line, decoding the encoded signal into the original plurality of signals, and providing the original plurality of signals to another plurality of function blocks through a plurality of internal signal lines.

Abstract: A transmission method for communication in each of cells of a communication system within a cellular region which contains a plurality of base stations each communicating with a plurality of subscribers includes an encoding step of encoding a transmission data, an interleaving step of interleaving a coded data by a predetermined time unit within a predetermined period of time, and a modulating and transmitting step of modulating and transmitting an interleaved data while decreasing a radio frequency output power on a specific time unit of the interleaved coded data.

Abstract: Adaptive equalization methods and adaptive equalizers used with precoded systems dominated by intersymbol interference (ISI) monitor the output of a DFE and compare it to a reference for updating a precoder in response to the comparison.

Abstract: A transmitter system (18) which transmits a communication signal (14) through a phased-array antenna (10) uses a signal processor (26) and a multiplicity of direct modulators (30). Each direct modulator (30) drives a single element (12) of the antenna (10). Each direct modulator (30) receives a digital baseband phase point data signal (62) from a digital data stream (28). The digital data stream (28) also conveys digital beam formation data (60). Each direct modulator (30) digitally combines the baseband phase point data (62) with the beam formation data (60) to produce digital streams that modulate an RF carrier signal (34). The digital data stream (28) is generated by a phased-array signal processor (26) which processes user data bits (86) received from any number of input signals (22) and processes beam signals (24). In one embodiment, the signal processor (26) calculates phase point data (62) representative of all input signals (22).

Abstract: It is intended to reduce the rate of occurrence of prediction value judgment errors. Where a prediction value x'.sub.n-1 of a 1-clock preceding code is 0, a judgment circuit 1 outputs a value "1" as a prediction value x'.sub.n if a reproduction signal value y.sub.n sampled at time n is greater than or equal to a threshold value .eta. that is supplied from a threshold value generating circuit 6, and outputs a value "-1" as the prediction value x'.sub.n if y.sub.n <.eta.. Where x'.sub.n-1 is not 0, the judgment circuit 1 outputs a value "0" as the prediction value x'.sub.n. Therefore, the control circuit 1 outputs a value "0" every other clock as a prediction value. During the interval between the first two clocks, the threshold value .eta. is set at 0. Then, when supplied with codes of a given pattern that are arranged at the start, a switch 2 selects the prediction value x'.sub.n that is supplied from the judgment circuit 1. An operation circuit 16 calculates a phase error .DELTA..tau..sub.

Abstract: A direct sequence spread spectrum receiver samples an incoming signal and stores the sample in memory. Prior to sampling and storage, the incoming signal is translated to an IF signal. Also prior to storage, the IF signal is corrected for a frequency offset signal. The frequency offset may be caused by many sources, Doppler shift or local oscillator error, for example. Once the signal is corrected for the frequency offset, the signal sample is stored in memory. The signal sample is read from memory as necessary to process the signal. Such a receiver is useful in global positioning satellite (GPS) signal processing where the incoming signal contains several satellite transmissions encoded with CDMA encoding.

Abstract: A method for synchronization of a clock signal, which can be generated in a data receiving station, with a clock signal which is used in a data transmitting station. The synchronization is in each case carried out by evaluating a value and a time of received timemark data which represents a count that is dependent on the clock signal frequency in which the timemark data are transmitted to the data receiving station from the data transmitting station. The described method is distinguished by the fact that a parameter which characterizes the frequency of the clock signal of the data transmitting station is estimated in the data receiving station, at least partially taking into account the respective current timemark data and the previously received timemark data, and by the fact that a clock signal generator, which produces the clock signal to be synchronized, is triggered on the basis of the estimated value obtained in this way.

Abstract: A service clock regenerator regenerates a local clock from time stamps of a remote clock transmitted over a network by determining the slope of (or difference between current and previous) time stamps of the remote clock and the slope of time stamps of the local clock. A phase difference is formed as the difference between the slope of the time stamps of the remote clock and the slope of the time stamps of the local clock and this phase difference is accumulated to generate a phase error signal. The phase error signal is filtered to generate a frequency adjustment signal having a magnitude that depends on the phase error signal. The frequency of the local clock is adjusted according to the magnitude of the frequency adjustment signal thereby reducing a phase difference between the remote time stamps and the local time stamps.

Abstract: A transmitting apparatus for code division multiplexed signals used in the spread spectrum communication has its analog amplifier rid of spurious generation and relieved of the need of having a large transmission back-off, thereby accomplishing the low-power, low-cost and simple design of the amplifier.Multi-channel transmission signals are rendered the spread spectrum with a spread code, and the resulting code division multiplexed signal undergoes the peak amplitude limitation so that the last-stage analog amplifier can have a small back-off.

Abstract: In a system for simulcasting digitally modulated and analog FM signals over the same FM frequency band, the effect of the analog FM signal on the digitally modulated signal in the simulcast is calculated and canceled from the latter signal before its transmission. As a result, the digital transmission is free from interference from the analog FM signal. Moreover, the digital transmission is designed in such a manner that the interference caused thereby to the analog FM signal is kept at a minimal level.

Abstract: A communication device (60) for simultaneously transmitting independent information (82) on multiple channels comprises a modulator (66) and at least two matched filters (68-70). Each matched filter has a unique predetermined characteristic that is a time-reversed, complex conjugate of a complex waveform shape (72) produced by the modulator (66) in response to a channel encoder previously supplying known codeword vectors (75) to the modulator (66). Therefore, a composite signal envelope (82) produced for transmission by the communication device (60) of FIG. 4 has a reduced peak-to-mean envelope power ratio (PMEPR), since relatively large excursions in complex waveform shapes subsequently generated by the modulator (66) are unmatched by the unique filter characteristics while relatively small excursion are matched and therefore enhanced.

Abstract: Methods for identification of, and compensation for, the effects of presence of a multipath signal in a received composite digital signal that includes a direct, distortion-free signal. A direct signal is additively or multiplicatively combined with a distinguishable indicium signal and the resultant signal is transmitted to a receiver. The indicium signal may be distinguished by use of a different frequency or by use of a bit pattern that cannot be included in a direct signal pattern. The receiver identifies the received indicium signal within the received signal, compares the received indicium signal with a reference signal that is substantially a replica of the transmitted indicium signal, determines what operations will convert the reference signal into the received indicium signal, and applies an inverse of these operations to the portion of the received signal that contains the received direct signal, to obtain an enhanced received direct signal with reduced multipath signal effects.

Abstract: A service clock regenerator regenerates a local clock from time stamps of a remote clock transmitted over a network by determining the slope of (or difference between current and previous) time stamps of the remote clock and the slope of time stamps of the local clock. A phase difference is formed as the difference between the slope of the time stamps of the remote clock and the slope of the time stamps of the local clock and this phase difference is accumulated to generate a phase error signal. The phase error signal is filtered to generate a frequency adjustment signal having a magnitude that depends on the phase error signal. The frequency of the local clock is adjusted according to the magnitude of the frequency adjustment signal thereby reducing a phase difference between the remote time stamps and the local time stamps.

Abstract: The present invention provides a digital clock recovery circuit, which includes a frequency synthesizer generating a number of clock phase signals. The digital clock recovery circuit also includes a phase interpolation unit, which interpolates the clock phase signals from the frequency synthesizer to increase the number of clock phase signals. Additionally, the digital clock recovery circuit also includes a phase detector, a digital filter, and a phase selection unit. The phase detector has an output connected to a digital filter, which is connected to the phase selection unit. The phase detector sends signals filtered through the digital filter to select clock phase signals input into the phase selection unit from the phase interpolation unit. The output of the phase selector provides the recovered clock signal and also connected to the input phase detector.

Abstract: A high-frequency radio signal receiving apparatus for digital communication includes a receiving antenna for receiving a high-frequency radio wave, a frequency converter for converting a signal supplied from the receiving antenna through a wide-band bandpass filter into a signal of an intermediate frequency band, an impulsive noise detecting unit for detecting impulsive noise on the basis of a signal outputted from the frequency converter. The apparatus further includes an impulsive noise correcting unit for correcting the signal outputted from the frequency converter in dependence on a signal outputted from the impulsive noise detecting unit, and a demodulating unit for demodulating a signal outputted from the impulsive noise correcting unit and supplied by way of a narrow-band bandpass filter.

Abstract: A direct sequence spread spectrum receiver samples an incoming signal and translates the signal to an IF signal. The IF signal is sampled and stored in memory. In one embodiment, the memory consists of two memory banks which alternately receive sample segments. During a write period to one of the memory banks, the other memory bank supplies its output to a processor. This continues in a ping-pong manner. In another embodiment, a single memory bank is filled and read as necessary, the receiver ignoring incoming signal until the processor has completed processing the sample available at the output of the memory. Such a receiver is useful in global positioning satellite (GPS) signal processing where the incoming signal contains several satellite transmissions encoded with CDMA encoding.