Abstract: A semiconductor memory device includes a first wiring region and a second wiring region located adjacent to the first wiring region. First lines located in the first wiring region include a first portion, a first lead portion and first inclined portion. Second lines located in the second wiring region include a second portion, a second lead portion and a second inclined portion. The first and second portions are located in parallel with a same pitch, the first and second lead portions are located with a pitch which is larger than the pitch of the first and second portions, the first and second inclined portions extend the same direction at a predetermined angle.