Patents Examined by Amine Riad
  • Patent number: 11237890
    Abstract: An aspect includes receiving a drive log page including data from a plurality of disk devices, in which the drive log page includes a plurality of attribute fields including a reassignment field that tracks data movement from a failing sector of a disk device to a new sector of the disk device. Performing, by the system, a failure prediction based on attribute data of the drive log page to identify one or more disk devices of the plurality of disk devices that are predicted to fail. Disabling, by the system, the one or more disk devices in response to the failure prediction.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: February 1, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Verburg, Timothy O'Callaghan, M. Dean Sciacca
  • Patent number: 11221927
    Abstract: A controller-implemented method, according to one embodiment, includes: receiving, by a first controller, data. Metadata associated with the data is stored, by the first controller, in a specified system memory location. Second metadata received from a second controller is also stored, by the first controller, in the specified system memory location, thereby creating combined metadata. In response to the second controller entering a failed state: snapshots of the combined metadata are stored, by the first controller, to resilient storage at a predefined interval. Moreover, additional data continues to be received by the first controller. Metadata associated with the additional data is stored, by the first controller, in the specified system memory location, while changes to the metadata which occur between the snapshots of the combined metadata are also stored by the first controller. According to some approaches, the changes to the metadata are stored in a log structured array.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: January 11, 2022
    Assignee: International Business Machines Corporation
    Inventors: Lior Chen, Daniel Gan-Levi, Ronen Gazit, Ofer Leneman, Deborah A. Messing
  • Patent number: 11200105
    Abstract: Methods, systems, and apparatuses related to detecting and reporting failures for a memory device are described. When a count of bit-flip errors is above a fail threshold, a memory device can report a failure. Failure reports can indicate a rate at which the memory device is accumulating errors. An offset fail threshold may be applied instead of a default fail threshold, such as a standardized or specified threshold. The offset fail threshold can be a summation of the default fail threshold and an offset determined from an initial error count determined before the memory device has accumulated errors from use.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: December 14, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Randall J. Rooney, Gregg D. Wolff
  • Patent number: 11194649
    Abstract: A method, system and computer program product for providing early diagnosis of hardware, software or configuration problems in a data warehouse system. A received query is parsed to determine the properties of the query. The query may then be joined to existing groups of queries if those groups have shared properties of the query. After executing the query according to an execution plan, results from the execution of the query is received, which may include problem(s) that occurred during execution of the query. For those problems that reach a pre-defined threshold of becoming a “group problem” in those groups joined by the query, the problem is reported to the end user concerning those groups where the problem exceeds the pre-defined threshold. In this manner, an early diagnosis of the problems in the data warehouse system that can cause delay and failure of the processing of queries is able to occur.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: December 7, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lukasz Gaza, Artur M. Gruszecki, Tomasz Kazalski, Bartlomiej T. Malecki, Konrad K. Skibski, Tomasz Stradomski
  • Patent number: 11182269
    Abstract: A computer-implemented method for proactive change verification is provided. Aspects include analyzing runtime execution characteristics from a plurality of base activity metrics and a plurality of experimental activity metrics and creating a plurality of activity pairs wherein each activity pair comprises a base activity metric and its corresponding experimental activity metric. Aspects also include identifying significant activity pairs from the plurality of activity pairs wherein the experimental activity significantly deviates from its corresponding base activity and classifying significant activity pairs by deviation type. Aspects further include sorting activity pairs by their impact and removing activity pairs that have an impact of less than a threshold amount, wherein the threshold amount is based on the deviation type.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: November 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel Rosa, Donald William Schmidt, Qi Liang, Gui Yu Jiang
  • Patent number: 11175900
    Abstract: Systems and methods for updating software in a hazard detection system are described herein. Software updates may be received by, stored within, and executed by a hazard detection system, without disturbing the system's ability to monitor for alarm events and sound an alarm in response to a monitored hazard event. The software updates may be received as part of a periodic over-the-air communication with a remote server or as part of a physical connection with a data source such as a computer. The software updates may include several portions of code designed to operate with different processors and/or devices within the hazard detection system. The software updates may also include language specific audio files that can be accessed by the hazard detection system to play back language specific media files via a speaker.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: November 16, 2021
    Assignee: Google LLC
    Inventors: Jonathan Solnit, Kelly Veit, Edwin H. Satterthwaite, Jr., Jeffery Theodore Lee
  • Patent number: 11176010
    Abstract: A circuit-cycle fault reproduction system includes a hardware processor configured to execute at least one computing cycle corresponding to a given number instructions. A cycle tracking unit is configured to identify at least one test cycle included in a range of computing cycles starting from at a start cycle and completing at an end cycle. A fail cycle detection unit is in signal communication with the cycle tracking unit. The fail cycle detection unit is configured to identify a failed cycle among the plurality of test cycles based on a cycle difference between the starting cycle and the ending cycle, and to actively modify the range of computing cycles based on a comparison between the cycle difference and a cycle difference threshold value.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: November 16, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel Lewis, Diyanesh B. Chinnakkonda Vidyapoornachary, Sean Dalton
  • Patent number: 11163625
    Abstract: Systems and methods are described for optimizing logging of decision outcomes in distributed transaction protocols. An example method may comprise: executing, by a processing device, a transaction manager to coordinate a distributed transaction for a plurality of participants, transmitting, by the processing device via the transaction manager, prepare messages to the plurality of participants, and while waiting to receive responses from each of the plurality of participants, serializing a transaction log record of the distributed transaction.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: November 2, 2021
    Assignee: Red Hat, Inc.
    Inventor: Jonathan Halliday
  • Patent number: 11150970
    Abstract: Techniques involve: in response to a number of errors of an error type in a storage disk increasing, determining an adjustment rate for a health value of the storage disk based on a total usage time length of the storage disk, where a longer total usage time length corresponds to a higher adjustment rate, and the health value indicates a health condition of the storage disk with respect to the error type. The techniques further involve increasing the adjustment rate based on a total input/output (I/O) number of the storage disk, where a greater total number of I/Os corresponds to a greater increment. The techniques further involve adjusting the health value with the adjustment rate. Such techniques can improve the accuracy of evaluating the health condition of the storage disk.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: October 19, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Chun Ma, Geng Han, Hongpo Gao, Jianbin Kang, Lifeng Yang
  • Patent number: 11144417
    Abstract: A system to implement debugging for a multi-threaded processor is provided. The system includes a hardware thread scheduler configured to schedule processing of data, and a plurality of schedulers, each configured to schedule a given pipeline for processing instructions. The system further includes a debug control configured to control at least one of the plurality of schedulers to halt, step, or resume the given pipeline of the at least one of the plurality of schedulers for the data to enable debugging thereof. The system further includes a plurality of hardware accelerators configured to implement a series of tasks in accordance with a schedule provided by a respective scheduler in accordance with a command from the debug control. Each of the plurality of hardware accelerators is coupled to at least one of the plurality of schedulers to execute the instructions for the given pipeline and to a shared memory.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: October 12, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Niraj Nandan, Hetul Sanghvi, Mihir Mody, Gary Cooper, Anthony Lell
  • Patent number: 11132247
    Abstract: Aspects of the present disclosure include accessing block data stored in a memory component including memory blocks. The block data identifies bad blocks and reusable bad blocks, the reusable bad blocks having a higher level of reliability than bad blocks. Block selection is performed to select a block based on a block address. Based on the block selection and based on the block data, a tag operation is performed by setting a latch of the selected block to a first state in which access to the selected block is disabled.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: September 28, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Fulvio Rori, Chiara Cerafogli, Scott Anthony Stoller
  • Patent number: 11113166
    Abstract: A monitoring system includes a baseboard management controller (BMC) disposed on a same baseboard as a system under test; an administrator device electrically connected to the BMC; and a software test fixture stored in the BMC, the software test fixture generating an electrical signal, which is transferred to a corresponding target device of the system under test to access a register of the corresponding target device.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: September 7, 2021
    Assignee: Wiwynn Corporation
    Inventors: Bing-Han Yang, Po-Shen Kuo
  • Patent number: 11106553
    Abstract: Embodiments of the present invention provide a system for increasing intra-application efficiency by way of distributed failover. Embodiments of the invention allow data centers within an application to perform error recovery of failed transactions by shifting the processing load to another data center in the network without data redundancy amongst the data centers within the application. Avoiding the duplication of data within the data centers greatly reduces the amount of computing resources required to perform recovery and maintain service uptime, including, but not limited to, processing power, memory space, storage space, cache space, electric power, networking bandwidth, and I/O calls.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: August 31, 2021
    Assignee: BANK OF AMERICA CORPORATION
    Inventors: Brandon Matthew Castagna, Suresh Jagarlamudi
  • Patent number: 11099936
    Abstract: A flexible distributed multi-system architecture for aircraft control integrates electronic computers comprising plural types of high integrity, dissimilar, generic and reconfigurable controllers (GECs) that can assume different purposes. GECs are configured as actuator controllers (able to control up to three channels including hydraulic or electro-mechanical actuators) or as Control Law Computers (able to calculate more sophisticated and processor demanding control laws). The multi-system architecture is built around a backbone of high performance, high integrity digital protocols and three hubs with dual connection to two different GECs.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: August 24, 2021
    Assignee: Embraer S.A.
    Inventors: Marcelo Galvão, Marcos Vinicius Campos, Luiz Carlos Marengo
  • Patent number: 11093355
    Abstract: A system and method for addressing failures in electronic display assemblies is provided. Each of a plurality of electronic display assembles include an electronic display, one or more components for operating the electronic display assembly, and a control device. A network operations center is located remote from, but in electronic communication with, each of the electronic display assembles. If the control devices determine that any of the components are not operating properly, the control device is configured to remove the power supplied to the components, wait a predetermined amount of time, and resume applying power.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: August 17, 2021
    Assignee: Manufacturing Resources International, Inc.
    Inventors: William Dunn, David Williams, John Schuch
  • Patent number: 11074147
    Abstract: A method for a continuous mutual extended processor self-test is provided. The method is implemented by a system including a plurality of cores. The system sets an operating condition for the continuous mutual extended processor self-test. An assist processor of the plurality of cores executes a test program that implements the continuous mutual extended processor self-test on a core under test of the plurality of cores. The system determines a pattern and a response during the test program execution and repeats the test program until the test program has finished or failed.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: July 27, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tobias Ulrich Bergmann, Oliver Benke, Thomas Gentner
  • Patent number: 11056144
    Abstract: A non-transitory computer readable storage medium includes a tape having a plurality of partitions configured for storing data, and a plurality of read-only partition identifiers, each read-only partition identifier associated with one of the plurality of partitions and readable by a tape drive having a processor and memory for writing and reading tape data. Each read-only partition identifier selectively designates a corresponding one of the partitions as read-only to prevent data from being written to the designated read-only partition by the tape drive.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: July 6, 2021
    Assignee: Oracle International Corporation
    Inventors: David G. Hostetter, John Steven Herron
  • Patent number: 11055209
    Abstract: The present disclosure describes methods and apparatuses for application analysis with flexible post-processing. One test suite can be used to analyze an application for multiple different types of potential issues. In example implementations, an application is provided to an application runner. The application runner executes the application and crawls through various user interface (UI) screens from a user interaction perspective in accordance with a test suite. Based on different UI screens, the application runner generates a set of artifacts that includes metadata pertinent to different types of potential issues with operation of the application. Multiple different post-processors are provided access to the set of artifacts, with each respective post-processor corresponding to a respective type of issue.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: July 6, 2021
    Assignee: Google LLC
    Inventor: Hengxiang Hu
  • Patent number: 11023335
    Abstract: An abnormality of a computer is diagnosed accurately. A CPU writes an event log into an event log part. When a WDT detects an abnormality of the CPU, a backup part writes backup data into a backup data part. The backup part associates the event log with the backup data and adds a number of starts of the CPU to the backup data.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: June 1, 2021
    Assignee: OMRON Corporation
    Inventors: Masaichi Takai, Takamasa Mioki
  • Patent number: 11016833
    Abstract: Techniques and apparatus for remotely accessing debugging resources of a target system are described. A target system including physical compute resources, such as, processors and a chipset can be coupled to a controller remotely accessible over a network. The controller can be arranged to facilitate remote access to debug resources of the physical compute resources. The controller can be coupled to debug pin, such as, those of a debug port and arranged to assert control signals on the pins to access debug resources. The controller can also be arranged to exchange information elements with a remote debug host to include indication of debug operations and/or debug results.
    Type: Grant
    Filed: July 1, 2017
    Date of Patent: May 25, 2021
    Assignee: INTEL CORPORATION
    Inventors: Stalinselvaraj Jeyasingh, Subhankar Panda, David A. Locklear, Steven A. Filary, Christopher J. Stedman, Carlos Vallin