Patents Examined by Amir Zarablan
  • Patent number: 6429063
    Abstract: A method of creating a nitride, programmable read only memory (NROM) cell includes the step of decoupling injection of channel hot electrons into a charge trapping layer of the NROM cell from injection of non-channel electrons into the charge trapping layer. The step of decoupling can include the step of minimizing the injection of the non-channel electrons into the charge trapping layer. Alternatively, it includes the step of minimizing the generation of the non-channel electrons. The present invention includes cells which have minimal injection of non-channel electrons therein.
    Type: Grant
    Filed: March 6, 2000
    Date of Patent: August 6, 2002
    Assignee: Saifun Semiconductors Ltd.
    Inventor: Boaz Eitan
  • Patent number: 6301190
    Abstract: A semiconductor memory device uses in a test mode a clock signal from a tester to allow a test clock conversion circuit and a DLL circuit to generate a rapid internal clock. The internal clock is applied to serial parallel conversion circuits subjecting received, packetized data to serial parallel conversion, and an interface circuit receiving and decoding outputs from the serial-parallel conversion circuits and outputting a command such as ACT to a DRAM core. Furthermore, an internal packet generation circuit uses the internal clock to rapidly generate a testing packet signal. Thus the device's operation can be checked with a low speed tester, without externally receiving a rapid packet signal.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: October 9, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsunori Tsujino, Kazutoshi Hirayama, Kyoji Yamasaki
  • Patent number: 6261938
    Abstract: A method for fabricating a sub-micron structure of etch-resistant metal/semiconductor compound on a substrate of semiconductor material comprises the step of depositing onto the substrate a layer of metal capable of reacting with the semiconductor material to form etch-resistant metal/semiconductor compound, and the step of producing a focused electron beam. The focused electron beam is applied to the layer of metal to locally heat the metal and semiconductor material and cause diffusion of the metal and semiconductor material in each other to form etch-resistant metal/semiconductor compound. The focused electron beam is displaced onto the layer of metal to form the structure of etch-resistant metal/semiconductor compound. Finally, the layer of metal is wet etched to leave on the substrate only the structure of metal/semiconductor compound.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: July 17, 2001
    Assignee: Quantiscript, Inc.
    Inventors: Jacques Beauvais, Dominique Drouin, Eric Lavallee