Patents Examined by Andargie Aychillhum
  • Patent number: 9918393
    Abstract: A piezoelectric transformer includes a piezoelectric element. Two primary side electrodes exist on the primary side of the piezoelectric element. The primary side electrodes are coupled by a resistor formed from a conductive coating. A discharge current is discharged via the resistor to protect a semiconductor component from the discharge current. Since neither a short-circuit terminal nor conductive jig is required, electrostatic discharge damage to a semiconductor component can be prevented by a low-cost arrangement.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: March 13, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Osamu Nagasaki, Masamichi Iida, Hiroshi Mano
  • Patent number: 8559181
    Abstract: A flexible circuit comprises a folded dielectric sheet having conductive patterns on its surface(s) to which microelectronic device(s) are attached. The dielectric sheet is folded 180° about a selected axis and a bond layer joins the two halves over a portion of their respective surface areas so that a remaining portion of their areas remain unbonded and a bifurcated structure is thereby formed. Electrical contacts are provided on the unbonded or bifurcated portions of the flexible sheets. The flex may be attached to a rigid frame and provided with protective heat spreading covers. The folded flex design is particularly suitable for reel-to-reel manufacturing.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: October 15, 2013
    Assignee: Microelectronics Assembly Technologies, Inc.
    Inventors: James E. Clayton, Zakaryae Fathi
  • Patent number: 7417872
    Abstract: Trace configurations for carrying high-speed digital differential signals provide for reduced conduction loss and improved signal integrity. In one embodiment, a circuit board has a first set of conductive traces disposed on non-conductive material, and a second set of conductive traces parallel to the first set and disposed within the conductive material. The second set is separated from the first set by non-conductive material. Corresponding traces of the first and second sets may be in a stacked configuration. In other embodiments, conductive material may be provided between corresponding traces of the first and second sets resulting in an “I-shaped” or “U-shaped” cross-section. In yet other embodiments, the trace configurations have “T-shaped” and “L-shaped” cross-sections.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: August 26, 2008
    Assignee: Intel Corporation
    Inventors: Yuan-Liang Li, Jiangqi He, Dong Zhong, David G. Figueroa
  • Patent number: 7414857
    Abstract: Low inductance capacitors include electrodes that are arranged among dielectric layers and oriented such that the electrodes are substantially perpendicular to a mounting surface. Vertical electrodes are exposed along a device periphery to determine where termination lands are formed, defining a narrow and controlled spacing between the lands that is intended to reduce the current loop area, thus reducing the component inductance. Further reduction in current loop area and thus component equivalent series inductance (ESL) may be provided by interdigitated terminations. Terminations may be formed by various electroless plating techniques, and may be directly soldered to circuit board pads. Terminations may also be located on “ends” of the capacitors to enable electrical testing or to control solder fillet size and shape. Two-terminal devices may be formed as well as devices with multiple terminations on a given bottom (mounting) surface of the device.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: August 19, 2008
    Assignee: AVX Corporation
    Inventors: Andrew P. Ritter, John L. Galvagni
  • Patent number: 7408786
    Abstract: The invention provides a printed circuit board (PCB) for use in an electronic device. The PCB comprises: a top side; a bottom side; an edge between the top side and the bottom side; a cavity from the top side to the bottom side; a region on the top side for mounting an electronic device; and a connector for receiving connections from the electronic device. In the PCB, the connector is located on either the bottom side or the edge of the side of the PCB. The electronic device can be a display module.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: August 5, 2008
    Assignee: Research in Motion Limited
    Inventors: Robert Lowles, James Robinson, Robert Phillips, Jacek Idzik, Jason Griffin, Marc Drader
  • Patent number: 7400511
    Abstract: An electronic component mounting structure includes a board and an electronic component mounted on a surface of the board. The board includes lands. The electronic component includes a body and terminals extending from the body. Each terminal is electrically connected to a corresponding one of the lands of the board. The terminal has a first terminal portion extending along the surface of the board and a second terminal portion extending toward the surface of the board. Each land includes a land portion electrically soldered to the first terminal portion and a blind hole for receiving the second terminal portion. The first terminal portion is soldered to the land portion in a reflow process under the condition that the second terminal portion is inserted in the blind hole.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: July 15, 2008
    Assignee: Denso Corporation
    Inventors: Atsushi Ito, Takayoshi Honda, Hidehiro Mikura, Tadashi Tsuruzawa, Takuya Sakuta
  • Patent number: 7385143
    Abstract: A thermal bonding structure and manufacture process of a flexible printed circuit (FPC) board are disclosed, and the thermal bonding structure includes a laminated structure having a first insulating layer with a solder pad area and showing parts of a first conductive layer, the first conductive layer, a second insulating layer, a second conductive layer, and a third insulating layer with a bonding area such that a part of the second conductive layer is exposed, and at least a through hole passing through the first conductive layer to the second conductive layer for propagating heat energy to fuse a solder. Accordingly, the reduction of heat energy lost in the third insulating layer improves the bonding quality, shortens the bonding period, and maintains the material stability under high temperature resulted from high heat energy.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: June 10, 2008
    Assignee: Au Optronics Corporation
    Inventors: Ya-Ting Ho, Li-Hui Chen
  • Patent number: 7379306
    Abstract: Components having different heights are installed in a multilayer substrate using a metal core layer formed by bonding a plurality of metal layers. The metal core layer includes through-holes and a spot-faced portion. Passive components and an active component are disposed in the through-holes and the spot-faced portion, respectively. These components are connected to conductive patterns formed on wiring layers, with connecting vias therebetween. Contact faces of each component with the connecting vias are controlled so as to be disposed at the same level with the metal layers.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: May 27, 2008
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Tatsuro Sawatari, Masashi Miyazaki
  • Patent number: 7375290
    Abstract: A printed circuit board with vias that reduce or eliminate radio frequency interference and method of forming the same. The printed circuit board includes non-conductive layers, conductive-layers interspersed between the non-conductive layers, vias extending through the non-conductive layers and the conductive layers, radio frequency absorbing material within each of the vias, where the radio frequency absorbing material is at a conductive layer within the printed circuit board at which a conductive trace is not connected to a via, an insulating layer over each radio frequency absorbing material, and a cylindrical conductive material within via and over each insulating layer.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: May 20, 2008
    Inventors: Young Hoon Kwark, Christian Schuster
  • Patent number: 7364438
    Abstract: A case that houses a circuit component includes a frame along a peripheral edge of a circuit board, and a cover assembled to the frame so as to cover the circuit board, and connectors, facing an outer peripheral side of the frame are provided in the frame. In corresponding surfaces of the cover and each of the connectors, a first rib, a second rib, a first rib receiving groove, and a second rib receiving groove are formed that can regulate passage of a liquid in clearances between the connectors and the cover by fitting of protrusions and recesses. This prevents or limits a liquid outside the frame from entering the frame through the clearances between the connectors and the cover.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: April 29, 2008
    Assignees: Autonetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Yoshikazu Sasaki, Yukinori Kita
  • Patent number: 7362587
    Abstract: A multi-chip package includes a first semiconductor memory controlled by a clock signal and an inverted clock signal, and a second semiconductor memory controlled by the clock signal. The first semiconductor memory and the second semiconductor memory each include a circuit for guaranteeing that a signal delay is suppressed between a peripheral circuit, and a pad to which the clock signal is input, a pad to which the inverted clock signal is input, a pad for outputting a data enable signal and a pad for outputting a data signal. Thus, it is guaranteed that the signal delay is suppressed, and the reliability of the multi-chip package is improved.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: April 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yasuhiko Honda
  • Patent number: 7345887
    Abstract: A flexible printed board mounting structure includes a main body that has an attachment portion on its rear side surface, and a flexible printed board that is attached to the rear side surface and the attachment portion of the main body. The surface of the attachment portion is substantially perpendicular to the rear side surface. The flexible printed board includes a first area that is at least partially attached to the rear side surface of the main body, an attachment area to which a light-receiving IC is attached, the attachment area being attached to the attachment portion of the main body, and a connecting portion that is unitarily formed with the first area and the attachment area and connects the first area and the attachment area in a deflective manner. The position of the light-receiving IC can be easily adjusted relative to the attachment portion of the main body.
    Type: Grant
    Filed: April 28, 2005
    Date of Patent: March 18, 2008
    Assignee: Funai Electric Co., Ltd.
    Inventors: Kazuya Sudo, Takayuki Murakami
  • Patent number: 7321497
    Abstract: The invention provides an electronic circuit apparatus having a plurality of electronic circuit units (101a-101n), a circuit board (102) and a connection unit (103), the circuit board (102) having a basic board element (200) and a plurality of additional board elements (201-204), the plurality of additional board elements (201-204) being connected to the basic board element (200) by means of connecting elements (301-304) and the circuit units being arranged on the additional board elements (201-204) in such a way that in each case identical signal propagation times are provided between the circuit units arranged on an additional board (201-204) and the connection unit (103).
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: January 22, 2008
    Assignee: Infineon Technologies AG
    Inventors: Sven Boldt, Erwin Thalmann
  • Patent number: 7298627
    Abstract: A portable power inverter/converter having a pass through device for simultaneously sourcing A.C. and multiple voltage D.C. power consuming devices through a single D.C. power source connection. Inverter and converter circuitry is provided to invert and convert D.C. voltage to an A.C. voltage source and a lower DC voltage. A.C. electrical outlets are provided to facilitate a connection to an external A.C. power-consuming device and a DC outlet to a lower volt DC power-consuming device. The pass through device provides an independent and simultaneous connection to an additional D.C. outlet that would otherwise be eliminated when occupied by the inverter thus allowing simultaneous connection and operation of both A.C. and multi source D.C power consuming devices through a single external D.C. power outlet of a single D.C. power source.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: November 20, 2007
    Assignee: Intec, Inc.
    Inventors: Saied Hussaini, Marc Iacovelli
  • Patent number: 7297877
    Abstract: A substrate to which a laser technique is applied includes a signal layer, a micro via structure, and a differential signal pair. The micro via structure is divided into a first conductive column and a second conductive column after a laser-cutting step. The first conductive column includes a first flat conductive layer, and the second conductive column includes a second flat conductive layer. A first trace of the differential signal pair is parallel to and electrically connected to the first flat conductive layer. A second trace of the differential signal pair is parallel to and electrically connected to the second flat conductive layer. The distance between the first trace and the second trace is the same as the distance between the first flat conductive layer and the second flat conductive layer. The reflection of high-speed signals and the noise interferences can be reduced.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: November 20, 2007
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Chi-Tsung Chiu