Patents Examined by Andie C Stevenson
  • Patent number: 6569779
    Abstract: In order to obtain long time stability and usefulness for gas sensitive field-effect devices a micro structured surface is obtained below the final conducting layer. The conductive layer in the trenches or grooves will not only be protected to some extent but also they can constitute a conductive net with edges or boundaries that will remain essentially unchanged even if material is continuously lost along the borderline. The structure can be obtained in the layer laying directly below the conductive layer or in deeper lying layers with intermediate layers with even thickness.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: May 27, 2003
    Assignee: Nordic Sensor Technologies AB
    Inventors: Ingemar Lundström, Per Mårtensson
  • Patent number: 6482729
    Abstract: A semiconductor device for generating spin-polarized conduction electrons including a ferromagnetic semiconductor layer and a non-magnetic semiconductor layer having a band alignment of Type II with respect to the ferromagnetic semiconductor, said ferromagnetic semiconductor layer and non-magnetic semiconductor layer being connected together directly or with interposing therebetween another non-magnetic semiconductor layer or energy barrier layer such that a spin splitting of a conduction band of the non-magnetic semiconductor layer is induced by a spontaneous spin splitting of a valence band of the ferromagnetic semiconductor layer, and spin-polarized conduction electrons are generated in the non-magnetic semiconductor layer by the spin splitting of the conduction band of the non-magnetic semiconductor layer.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: November 19, 2002
    Assignee: Tohoku University
    Inventors: Hideo Ohno, Fumihiro Matsukura
  • Patent number: 6261852
    Abstract: A cathode-anode apparatus is constructed whereby the wafer under test, connected to a conducting wire, forms the cathode terminal and a copper plate, also connected to a conducting wire, forms the anode terminal. The wafer under test and the copper plate are immersed in a CuSO4—H2O solution. A positive dc voltage is applied to the copper plate; the dc current ionizes the CuSO4 solution and forms Cu2+ ions. These Cu2+ ions will diffuse to the wafer surface. Most of the Cu2+ ions will accumulate in and around defective contacts or vias in the semiconductor surface making these defective contacts or vias readily identifiable.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: July 17, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Ming-Chun Chou, Huai-Jen Shu