Abstract: A method for manufacturing a semiconductor device includes providing a substrate structure having an action region and a gate structure having a gate dielectric layer, a gate, a hardmask. The method also includes forming a first dielectric layer on the gate structure, forming a second dielectric layer on the first dielectric layer, performing a surface treatment on the second dielectric layer so that the upper surface of the second dielectric layer is flush with the upper surface of the mask member, which has a first recess is in its middle portion, forming a third dielectric layer on the second dielectric layer covering the mask member and selectively etching the third dielectric layer and the second dielectric layer relative to the first dielectric layer and the hardmask to form an opening adjacent to the gate structure and exposing the first dielectric layer on sidewalls of the gate structure.
Type:
Grant
Filed:
June 16, 2017
Date of Patent:
March 26, 2019
Assignees:
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
Abstract: A method of fabricating a flip chip ball grid array (FC-BGA) package is provided. First, a substrate including a first surface and a second surface is provided, wherein the first surface includes a plurality of cavities. Then, a plurality of flip chips is adhered in the cavities of the substrate. Thereafter, an underfill filling step is performed to fill an underfill between the substrate the flip chips. Then, a ball placement step is performed to attach a plurality of solder balls to a second surface of the substrate. Thereafter, the substrate is divided to separate a portion of the substrate adhering to the flip chips from a sidewall of the cavities.
Type:
Grant
Filed:
July 22, 2004
Date of Patent:
May 9, 2006
Assignee:
Advanced Semiconductor Engineering, Inc.
Abstract: A method of forming at least a partial air gap within a semiconducting device and the resulting devices, said method comprising the steps of: (a) depositing a sacrificial polymeric composition in one or more layers of the device during its formation; (b) coating the device with one or more layers of a relatively non-porous, organic, polymeric, insulating dielectric material (hardmask) having a density less than 2.2 g/cm3; and (c) decomposing the sacrificial polymeric composition such that the decomposition products permeate at least partially through the one or more hardmask layers, thereby forming at least a partial air gap within the device.
Type:
Grant
Filed:
April 1, 2003
Date of Patent:
September 20, 2005
Assignee:
Dow Global Technologies Inc.
Inventors:
Paul H. Townsend, III, Kenneth L. Foster