Patents Examined by Andy Nguyen
  • Patent number: 7285856
    Abstract: To prevent the occurrence of stress in the junction portion between the semiconductor element and the semiconductor package mounting the semiconductor element, so that cracks will not occur even when there is mounted a semiconductor element having a small strength. A package for semiconductor devices is formed as a laminate (20) of many layers including a plurality of conducting layers and insulating resin layers that are alternately laminated one upon other and having, on one surface of the laminate, a portion for mounting a semiconductor element. The whole regions or some regions of the insulating resin layers (20d to 20f) of the laminate, including at least the portion for mounting the semiconductor element and the peripheries thereof, are constituted by a prepreg obtained by impregnating a woven fabric of a liquid crystal polymer with an insulating resin.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: October 23, 2007
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kazuhiko Ooi, Tadashi Kodaira, Eisaku Watari, Jyunichi Nakamura, Shunichiro Matsumoto
  • Patent number: 7098536
    Abstract: A structure is provided which includes a semiconductor device region including a first portion and a second portion. A current-conducting member is provided, which extends horizontally over the first portion but not over the second portion. A first film, such as a stress-imparting film, extends over the second portion and only partially over the current-conducting member to expose a contact portion of the member. A first contact via is provided in conductive communication with the contact portion of the member, the first contact via having a self-aligned silicide-containing region. A second contact via is provided in conductive communication with the second portion of the semiconductor device region, the second contact via extending through the first film.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: August 29, 2006
    Assignee: International Business Machines Corporation
    Inventors: Haining S. Yang, Clement H. Wann, Huilong Zhu
  • Patent number: 6064836
    Abstract: An image forming apparatus supervisory system is provided. The image forming apparatus supervisory system includes an image forming apparatus and a control device. The image forming apparatus has an input unit for inputting an identification code and a transmission unit for transmitting the identification code. The control device is connected to the image forming apparatus, and has a reception unit for receiving the identification code and a transmission unit for transmitting to the image forming apparatus a signal for informing the image forming apparatus of a permitted number of time an image can be formed in response to receipt of the identification code. Upon receipt of the signal from the control device, the image forming apparatus permits forming an image the permitted number of times.
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: May 16, 2000
    Assignee: Minolta Co., Ltd.
    Inventors: Hidenobu Nakamura, Tomokazu Kato, Hiroyuki Asai, Tomoyuki Atsumi
  • Patent number: 6003145
    Abstract: A computer monitoring apparatus for use with a computer system having a plurality of components interconnected by a system bus is provided to display system information related to the components and data information being transferred through the system bus, and comprises a controller for generating an operation inhibiting signal and a plurality of control signals in accordance with a function selection signal of a key input section, a buffer for temporally storing the system and data information, and a display section for displaying the system and data information on a screen thereof.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: December 14, 1999
    Assignee: SamSung Electronics Co., Ltd.
    Inventor: Bum-Ryong Hong
  • Patent number: 5991894
    Abstract: A method to recover lost data in a piece of information transmitted from a number of server computers to a client computer. The method includes the steps of transmitting by the server computers a piece of server data to the client computer. The piece of server data includes the piece of information and at least one redundant symbol. Due to the failing of at least a part of one of the server computers, data are lost. The client computer identifies such a loss. The client computer recovers the lost data using the one or more redundant symbols. Then, the remaining non-failing server computers transmit another set of server data, which include another piece of information with at least one additional redundant symbol over what was previously transmitted to the client computer. This will ensure that the client computer can recover additional data lost due to the failing of at least a part of another server computer.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: November 23, 1999
    Assignee: The Chinese University of Hong Kong
    Inventors: Jack Y. B. Lee, P. C. Wong
  • Patent number: 5991900
    Abstract: A bus controller for a computer system. The controller comprises a monitor for monitoring request signals and response signals between a first component and a second component each connected to a bus of the computer system; and a terminator controlled by the monitor to terminate a request from one of the first and second components if a response to the request has not issued within a predetermined period of time.
    Type: Grant
    Filed: June 15, 1998
    Date of Patent: November 23, 1999
    Assignee: Sun Microsystems, Inc.
    Inventor: Paul J. Garnett
  • Patent number: 5978931
    Abstract: A fault-tolerant memory device provided with a variable domain redundancy replacement (VDRR) arrangement is described. The memory device includes: a plurality of primary memory arrays; a plurality of domains having at least portions of one domain common to another domain to form an overlapped domain area, and at least one of the domains overlapping portions of at least two of the primary memory arrays; redundancy units, coupled to each of the domains, for replacing faults contained within each of the domains; control circuitry for directing at least one of the faults within one of the domains to be replaced with the redundancy units, wherein at least one other fault of the one domain is replaced by the redundancy unit coupled to another of the domains, if the at least one other fault is positioned within the overlapped domain area. Each redundancy unit supporting the primary memory arrays includes a plurality of redundant elements.
    Type: Grant
    Filed: July 16, 1997
    Date of Patent: November 2, 1999
    Assignees: International Business Machines Corporation, Siemens Aktiengesellschaft
    Inventors: Toshiaki Kirihata, Garbiel Daniel, Jean-Marc Dortu, Karl-Peter Pfefferl
  • Patent number: 5968182
    Abstract: A method and means within a hierarchical, demand/response DASD subsystem of the passive fault management type in which, upon the occurrence of fault, error, or erasure, a long device busy signal of finite duration is provided to a host CPU. Any DASD storage device subject to the anomaly is isolated from any host inquiry during this interval. These measures permit retry or other recovery procedures to be implemented transparent to the host and the executing application. This avoids premature declarations of faults, errors, or erasures and consequent host application aborts and other catastrophic measures. If the detected anomaly is not resolved within the allotted time, then other data recovery procedures can be invoked including device reset, the status reported to the host, and the next request processed.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: October 19, 1999
    Assignee: International Business Machines Corporation
    Inventors: James C. Chen, Julia Liu, Chan Y. Ng, William G. Sherman, II
  • Patent number: 5958069
    Abstract: A system includes a host, first and second devices which operate as an acting device and a standby device, and a simplex unit controlled by the acting device. Each device is provided with a monitoring unit for monitoring the occurrence of failure, means for notifying the other device of a failure in its own device, and active/standby notification means. The active/standby notification means notifies the simplex unit that its own device is acting or standing by when the device becomes the acting device or standby device in response to a command from the host. Upon a failure in the other device when its own device is standing by, the active/standby notification means notifies the simplex unit that its own device is now an apparent acting device. Upon a failure in its own device when its own device is acting, the active/standby notification means notifies the simplex unit that its own device is now an apparent standby device.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: September 28, 1999
    Assignee: Fujitsu Limited
    Inventors: Hiroya Kawasaki, Masaki Kira, Shiro Uriu, Yukinaga Toyoda, Kazumasa Sonoda
  • Patent number: 5944840
    Abstract: Apparatus and a method for monitoring the time for a computer to process a process associated with an interrupt asserted on a system bus. When the interrupt is asserted, a time stamp value and data associated with the interrupt are stored in one of a plurality of registers. The data associated with the interrupt include an identification of the type of interrupt, the bus, and a device asserting the interrupt. Whenever a time stamp value and associated data are stored in a register, a flag is set ON to indicate information is stored therein. The time stamp value and associated data are stored in an overflow register if every other register is in use. A latency value for the interrupt is determined from the difference between the time stamp value stored in a register and the time when processing of the interrupt process is complete.
    Type: Grant
    Filed: September 10, 1997
    Date of Patent: August 31, 1999
    Assignee: Bluewater Systems, Inc.
    Inventor: Paul D. Lever
  • Patent number: 5930472
    Abstract: A browser functionality is split between a wireless client (122) and an infrastructure portion (102) of a wireless communication system. The infrastructure portion sends (412) to the wireless client a response from a server (124) to an earlier request originated (404) by the wireless client, the response modified by the infrastructure portion to comprise a placeholder for an additional data element needed to complete the response. Without a need for a further request from the wireless client, the infrastructure portion then originates (414) a request to the server for the additional data element and forwards (418) the additional data element to the wireless client when received from the server.
    Type: Grant
    Filed: April 29, 1998
    Date of Patent: July 27, 1999
    Assignee: Motorola, Inc.
    Inventor: Dwight Randall Smith