Patents Examined by Angel L. Casiano
  • Patent number: 6636908
    Abstract: A device, system and methods of data management are disclosed, which facilitate the implementation of improved mirroring, back-up, volume remapping, extent relocation, prefetching, caching, data reformatting, statistic gathering, and data translation, among others. A new, intelligent I/O stream splitter is disclosed that may intercept and alter an I/O stream received by the splitter from a communications link. For example, in the case of mirroring, the intelligent splitter may intercept write commands and associated data from a mainframe that target a specific storage location on a specific control unit. The splitter may then transmit the intercepted I/O stream to the targeted control unit and storage location over one link and in parallel transmit on another link an altered version of the intercepted I/O stream to another control unit, which is responsible for holding a mirrored version of the data.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: October 21, 2003
    Assignee: SANgate Systems, Inc.
    Inventors: Alexander Winokur, Seweryn Mokryn, Marek Mokryn
  • Patent number: 6636924
    Abstract: A multiport device is configured to recognize each active segment on a bus, and to selectively propagate signals within the device depending upon whether the segment is active. Optimal signal propagation is achieved by invoking the control of the propagation of signals only after a first active-transition on the bus. Initial transitions are propagated unconditionally, to minimize propagation delay, and subsequent signal propagations are conditionally controlled, to avoid latch-up. A latch is associated with each port. The latch is set each time the port is actively driven by a device on that port. The latch is reset when all the devices are in the quiescent state, or when another port remains active after the currently active port becomes inactive. The state of each port's latch controls the propagation of internally generated signals to the port. If the latch is set, internally generated signals are not propagated to the port, thereby preventing latch-up.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: October 21, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Alma Anderson
  • Patent number: 6629166
    Abstract: Methods and systems for interfacing one or more Input/Output (I/O) controllers to a channel-based switched fabric. One or more channel adapters allow connection of the one or more I/O controllers to the channel-based switched fabric. The channel adapters support transferring of messages or data between the one or more I/O controllers and one or more initiating units connected to the channel-based switched fabric. An adaptable physical interface exists between the one or more I/O controllers and the adapters. A set of command primitives are used for communicating information between the one or more I/O controllers and the adapters via the physical interface.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: September 30, 2003
    Assignee: Intel Corporation
    Inventor: Paul Grun
  • Patent number: 6609172
    Abstract: There is disclosed a wired-AND bus emulator circuit that allows any node to prevent propagation of information through the node. A controller can command all other controllers on the bus to break the bus thereby allowing the controller to determine the topology and possibly dynamically program the address of each controller on the bus. By allowing a controller to determine the bus topology, and possibly program the address of each other controller, the bus designer can configure the bus in a topology that is physically convenient. Additionally, the installer is not required to program each node with a unique address.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: August 19, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Gary G. Stringham
  • Patent number: 6553438
    Abstract: Methods and system for a message resource pool with asynchronous and synchronous modes of operation. One or more buffers, descriptors, and message elements are allocated for a user. Each element is associated with one descriptor and at least one buffer. The allocation is performed by the message resource pool. The buffers and the descriptors are registered with a unit management function by the message resource pool. Control of an element and associated descriptor and at least one buffer is passed from the message resource pool to the user upon request by the user. The control of the element and associated descriptor and at least one buffer is returned from the user to the message resource pool once use of the element and associated descriptor and at least one buffer by the user has completed.
    Type: Grant
    Filed: April 24, 2000
    Date of Patent: April 22, 2003
    Assignee: Intel Corporation
    Inventors: Jerrie L. Coffman, Mark S. Hefty, Fabian S. Tillier