Patents Examined by Anh Tran
  • Patent number: 9035560
    Abstract: The present invention provides an LED (Light-Emitting Diode) driving control circuit for controlling a converting circuit to transform an input power source into an output voltage for driving an LED module. The LED module has a plurality of LED strings. The LED driving control circuit includes a voltage detecting circuit and a feedback control circuit. The voltage detecting circuit has a plurality of detection circuits, and each detection circuit is coupled to a terminal of the corresponding LED string to determine whether a voltage of the terminal is higher or lower than a preset value. The voltage detecting circuit generates a feedback signal according to the determination results. The feedback control circuit controls the converting circuit to modulate the output voltage according to the feedback signal.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: May 19, 2015
    Assignee: Green Solution Technology Co., Ltd.
    Inventors: Hai-Po Li, Shian-Sung Shiu, Li-Min Lee
  • Patent number: 9030227
    Abstract: A multi-chip package may include first and second integrated circuit dies that are each partitioned into multiple logic regions. The logic regions of the first and second dies may be coupled via interconnects. Each integrated circuit die may include at least one spare logic region. Multiple logic groups may be formed with each logic group including logic regions from the first and second integrated circuit dies and the interconnects that couple those logic regions. The logic groups may be evaluated to identify defective logic groups. In response to identifying a defective logic group, the defective logic group may be repaired by configuring the first and second integrated circuit dies to stop using the defective logic group and to use a spare logic group. The spare logic group may include spare logic regions of the first and second dies that are coupled by spare logic region interconnects.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: May 12, 2015
    Assignee: Altera Corporation
    Inventor: David Cashman
  • Patent number: 9018978
    Abstract: A novel configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations is provided. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. The configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. The configuration network is a pipelined network.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: April 28, 2015
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubchandani, Herman Schmit, Steven Teig
  • Patent number: 9018845
    Abstract: Provided is a circuit for adjusting light-emitting diode (LED) current; the circuit comprises: a single-output constant current source (21), a multi-path LED output circuit (22) and a control bus (20) connected to the multi-path LED output circuit (22); any given LED output circuit comprises: a load circuit (23), an adjustment circuit (24), a current regulation circuit (25) and an adjustment control circuit (26). The circuit for adjusting LED current provided in the technical solution of the present invention adjusts the current of each LED output circuit via the load circuit, the adjustment circuit, the current regulation circuit and the adjustment control circuit, thus adjusting characteristic parameters such as color, color temperature, color rendering index, brightness and the like of the LED light source, thereby avoiding the problem of high cost caused by using multi-path constant current DC/DC circuit to adjust the current of each path.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: April 28, 2015
    Assignee: Inventronics (Hangzhou), Inc.
    Inventors: Liang'an Ge, Xiaoli Yao
  • Patent number: 9018979
    Abstract: A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: April 28, 2015
    Assignee: Cypress Semiconductor Corporation
    Inventors: Warren Snyder, Bert Sullam, Haneef Mohammed
  • Patent number: 9013207
    Abstract: In some embodiments, provided is a processor chip including self deactivation logic to deactivate the processor chip after a threshold of qualified events have been monitored.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: April 21, 2015
    Assignee: Intel Corporation
    Inventors: Yuri I. Krimon, David I. Poisner, Reinhard R. Steffens
  • Patent number: 9006981
    Abstract: End-of-life indicators for lamps, and methods for indicating the end-of-life for lamps, are provided. A solid state light source end-of-life indicator is located on the exterior of a housing of a lamp, and includes at least one light emitting diode. The solid state light source end-of-life indicator emits light at the end of the life of the lamp. The solid state light source end-of-life indicator may emit light upon receiving an end-of-life signal from an end-of-life detection circuit, which detects when the lamp is at an end of its life.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: April 14, 2015
    Assignee: OSRAM SYLVANIA Inc.
    Inventors: Heinz W. Ito, Dan Bodocan, Shaun P. Montana
  • Patent number: 9007090
    Abstract: A programming element including a first transistor, a second transistor, and a capacitor between a logic circuit using a semiconductor element and a power supply is provided. In the programming element, a node where a drain electrode of the first transistor, a gate electrode of the second transistor, and one of electrodes of the capacitor are electrically connected to each other is formed. A potential can be supplied to each of a source electrode of the first transistor and the other of the electrodes of the capacitor. The power supply and the logic circuit are electrically connected to each other through a source electrode and a drain electrode of the second transistor. A connection state between the power supply and the logic circuit is controlled in accordance with the state of the second transistor.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: April 14, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasuhiko Takemura
  • Patent number: 9000678
    Abstract: An LED lamp with an integrated circuit, a rectifier, and a string of series-connected LEDs rectifies an incoming AC signal. The integrated circuit includes power switches that can separately and selectably short out a corresponding one of several groups of LEDs in an LED string across which the rectified AC signal is present. As the voltage across the string increases, the integrated circuit controls the power switches to increase the number of LEDs through which current flows, whereas as the voltage across the string decreases the integrated circuit controls the power switches to decrease the number of LEDs through which current flows. The flow of LED string current is broken to reduce flicker. Alternatively, a valley fill capacitor peaks LED current during the valleys of the incoming AC signal to reduce flicker. LED current is regulated to provide superior efficiency, reliability, power-factor correction, and lamp over-voltage, -current, and -temperature protection.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: April 7, 2015
    Assignee: Active-Semi, Inc.
    Inventor: Steven Huynh
  • Patent number: 9000682
    Abstract: A dimming circuit and method for a LED provide a first driving voltage or a second driving voltage according to a dimming signal provided by a functional IC to enable or disable the LED. The values of the first and second driving voltages are controlled so that overstressing of the LED is avoided while the functional IC is capable of working even when the LED is off. The LED's life time is thus prolonged.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: April 7, 2015
    Assignee: Richpower Microelectronics Corporation
    Inventors: Chen-Jie Ruan, Chin-Hui Wang, Peng-Ju Lan
  • Patent number: 9000687
    Abstract: A method for mixing light of LEDs includes following steps: Firstly, a substrate with a red light LED, a green light LED and a blue light LED arranged thereon is provided. Secondly, a power source for supplying power to the red light LED, the green light LED and the blue light LED is provided. Thirdly, a temperature variation ?T1 of the red light LED caused by the power source, a temperature variation ?T2 of the green light LED caused by the power source, a temperature variation ?T3 of the blue light LED caused by the power source are calculated. And finally, input currents applied to the red light LED, the green light LED and the blue light LED are adjusted according to the temperature variations ?T1, ?T2 and ?T3. A lighting device using the method is also provided.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: April 7, 2015
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Chih-Chen Lai
  • Patent number: 8994294
    Abstract: An LED flash module includes: a module substrate; an energy device disposed on the module substrate; an LED module arranged on the module substrate includes a plurality of LED blocks arranged in a first direction, each LED block including a plurality of LED elements which is arranged in a second direction perpendicular to the first direction and emits light with power supplied from the energy device; a charger circuit arranged on the module substrate to charge the energy device; and a control circuit arranged on the module substrate to control emission of LED elements. A wiring length from one of the LED elements to a plus terminal of a power supply portion supplying power to each of the LED elements and a wiring length from the one of the LED elements to a minus terminal of the power supply portion is substantially the same for all of the LED elements.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: March 31, 2015
    Assignee: Rohm Co., Ltd.
    Inventors: Hideki Sawada, Kazuyuki Hiratsuka
  • Patent number: 8994284
    Abstract: A high intensity discharge lamp (HID) control circuit and method are provided in the present invention. The circuit includes a first winding and a second winding, both of which are coupled with a series-connected inductor of an HID lamp circuit; a current zero point detector for detecting an inductor current zero crossing signal in the HID lamp circuit; an inductor current signal generator for generating an inductor current signal in the circuit to indicate a current value of the HID lamp; a modulator having input terminals connected to the current zero point detector and the inductor current signal generator, respectively, and an output terminal connected to a driving circuit for the HID lamp; and the driving circuit for driving switches in the HID lamp control circuit.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: March 31, 2015
    Assignee: Delta Electronics (Shanghai) Co., Ltd.
    Inventors: Qi Zhang, Weiqiang Zhang, Jianping Ying
  • Patent number: 8981813
    Abstract: A logic processing device, containing an application specific integrated circuit (“ASIC”) and field programmable gate array (“FPGA”), capable of automatically interfacing between ASIC and FPGA is disclosed. The logic processing device, in one aspect, includes a phase adjustment circuit, ASIC, and configurable logic circuit (“CLC”) wherein the CLC can be an FPGA. While ASIC is able to perform a specific function in accordance with an ASIC clock domain, the CLC is capable of performing a programmable logic function in accordance with an FPGA clock domain. The phase adjustment circuit is used to automatically facilitate a communication between the ASIC and the CLC in accordance with the ASIC clock domain and the FPGA clock domain.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: March 17, 2015
    Assignee: Agate Logic, Inc.
    Inventors: Kai Keung Chan, David Tsang, Shian-Jiun Fu, Chao-Chiang Chen
  • Patent number: 8981810
    Abstract: A method, non-transitory computer readable medium, and apparatus for preventing accelerated aging of a physically unclonable function (PUF) circuit are disclosed. For example, the method monitors an environmental condition associated with the physically unclonable function circuit, detects a change in the environmental condition associated with the physically unclonable function circuit, and, in response to the change in the environmental condition, implements a security function for preventing the accelerated aging of the physically unclonable function circuit.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: March 17, 2015
    Assignee: Xilinx, Inc.
    Inventors: Stephen M. Trimberger, Austin H. Lesea
  • Patent number: 8975918
    Abstract: To optimize the arrangement of configuration data stored in a configuration memory. A lookup table includes a memory configured to store configuration data, a plurality of multiplexers each configured to select one signal from a plurality of input signals in accordance with the configuration data supplied from the memory and output the one signal, and an inverter. The plurality of multiplexers are connected in a binary tree with multiple levels. The inverter is provided between one of input terminals of a multiplexer in an uppermost level and an output terminal of a multiplexer in one level lower than the uppermost level. Signal selection is performed in each of the multiplexers so that the multiplexer in the uppermost level outputs, as an output signal, one signal of all input signals of the multiplexers in a lowermost level.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: March 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasuhiko Takemura
  • Patent number: 8975984
    Abstract: A micro-electro-mechanical transducer (such as a cMUT) having a non-flat surface is disclosed. The non-flat surface may include a variable curve or slope in an area where a spring layer contacts a support, thus making a variable spring model as the spring layer vibrates. The non-flat surface may be that of a non-flat electrode optimized to compensate the dynamic deformation of the other electrode during operation and thus enhance the uniformity of the dynamic electrode gap during operation. Methods for fabricating the micro-electro-mechanical transducer are also disclosed. The methods may be used in both conventional membrane-based cMUTs and cMUTs having embedded springs transporting a rigid top plate.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: March 10, 2015
    Assignee: Kolo Technologies, Inc.
    Inventor: Yongli Huang
  • Patent number: 8963436
    Abstract: A light emitting element driving device, which flashing-drive a plurality of light emitting element arrays connected in parallel by switching elements connected in series with each of the plurality of light emitting element arrays, the light emitting element driving device including: a current detection unit configured to detect respective currents flowing through each of the plurality of light emitting element arrays as currents of the light emitting element arrays; a selection unit configured to select the smallest current of the light emitting element arrays of the detected currents obtained by the current detection unit; and an output voltage control unit configured to control output voltage supplied to the plurality of light emitting element arrays so that the current of the light emitting element arrays selected by the selection unit becomes a preset reference current value.
    Type: Grant
    Filed: January 10, 2013
    Date of Patent: February 24, 2015
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Hiroaki Nakamura, Shohei Osaka
  • Patent number: 8963577
    Abstract: A termination impedance apparatus includes a variable pull-up resistor, a variable pull-down resistor, and a small-signal calibration circuit. The variable pull-up resistor is coupled between a first power supply voltage terminal and an output terminal. The variable pull-down resistor is coupled between the output terminal and a second power supply voltage terminal. The small-signal calibration circuit is for calibrating the variable pull-up resistor and the variable pull-down resistor to achieve a desired small-signal impedance.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: February 24, 2015
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Warren R. Anderson, Shyam S. Sivakumar, Austen J. Hypher
  • Patent number: 8952722
    Abstract: Configuration is performed in accordance with a plurality of states when power supply voltage is supplied intermittently. At the time of start of supply of power supply voltage with configuration, a programmable logic device is sequentially changed into a first state where configuration data is not set in a configuration memory, a second state where the configuration memory is initialized, and a third state where the configuration data can be set in the configuration memory. At the time of start of supply of power supply voltage without configuration, the programmable logic device is sequentially changed into a fourth state where the configuration data is not set in the configuration memory and the third state. The first to fourth states are switched to any one of the states by control of a first state signal and a second state signal.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: February 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa