Patents Examined by Anita Alankeo
  • Patent number: 5945349
    Abstract: A method of enabling analysis of defects of a semiconductor with three dimensions includes the steps of: coating a photoresist film on the passivation layer except a predetermined portion of the passivation layer including a portion where the defects exist; coating a vinyl film on the photoresist film and on the side of the wafer; removing the passivation layer on the second metal interconnect; and removing an insulating layer formed between two metal interconnects using a selective wet etching. The defects existing in the metal interconnects remaining after etching of the passivation layer and insulating layer are thereby observable, e.g., with a scanning electron microscope or equivalent, the wafer being set on a holder of the scanning electron microscope and being changed in tilt and rotational angles whereby the analysis is enabled.
    Type: Grant
    Filed: July 19, 1996
    Date of Patent: August 31, 1999
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Jeong-Hoi Koo