Patents Examined by Anthony Gutiervez
  • Patent number: 4898836
    Abstract: In this process P+ type regions are diffused on a substrate of N type semiconductor meterial, said regions forming the horizontal isolation region of the NPN transistors and the low-resistivity collector region of the PNP transistors. Within each isolation region a high-concentration N+ type zone is created that acts as a low-resistivity collector region for the NPN transistors. An N type epitaxial layer is then grown over the whole surface of the device. The completion of the device is carried out in such a way to ensure that the low-concentration collector thickness of transistors NPN be practically equal to the low-concentration collector thickness of transistors PNP.
    Type: Grant
    Filed: April 21, 1989
    Date of Patent: February 6, 1990
    Assignee: SGS-Thomson Microelectronics S.R.L.
    Inventors: Raffaele Zambrano, Salvatore Musumeci