Abstract: A MOS transistor, in particular a vertical channel transistor, includes a semiconductor body housing a body region, a source region, a drain electrode and gate electrodes. The gate electrodes extend in corresponding recesses which are symmetrical with respect to an axis of symmetry of the semiconductor body. The transistor also has spacers which are also symmetrical with respect to the axis of symmetry. A source electrode extends in electrical contact with the source region at a surface portion of the semiconductor body surrounded by the spacers and is in particular adjacent to the spacers. During manufacture the spacers are used to form in an auto-aligning way the source electrode which is symmetrical with respect to the axis of symmetry and equidistant from the gate electrodes.

Abstract: An organic light-emitting device includes: a first electrode; a second electrode facing the first electrode; m emission units stacked between the first electrode and the second electrode, each emission unit including at least one emission layer; and m?1 charge generating layers respectively located between two adjacent emission units among them emission units, each of the charge generating layers including one n-type charge generating region and one p-type charge generating region, wherein m is an integer of 2 or more, and at least one of the m?1 p-type charge generating regions includes a phosphate-containing compound.

Abstract: A semiconductor package is provided, including a package component and a number of conductive features. The package component has a non-planar surface. The conductive features are formed on the non-planar surface of the package component. The conductive features include a first conductive feature and a second conductive feature respectively arranged in a first position and a second position of the non-planar surface. The height of the first position is less than the height of the second position, and the size of the first conductive feature is smaller than the size of the second conductive feature.

Abstract: A semiconductor device includes: a substrate; a test transistor over the substrate; and multi-level metal interconnections formed over the substrate spaced apart from the test transistor, wherein at least one metal interconnection among the multi-level metal interconnections is a spiral metal interconnection.

Abstract: Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment, an electronic package comprises a package substrate, a first die over the package substrate, the first die having a first bump pitch, a second die over the package substrate, the second die having a second bump pitch that is greater than the first bump pitch, and a plurality of conductive traces over the package substrate, the plurality of conductive traces electrically coupling the first die to the second die. In an embodiment, a first end region of the plurality of conductive traces proximate to the first die has a first line space (L/S) dimension, and a second end region of the plurality of conductive traces proximate to the second die has a second L/S dimension. In an embodiment, the second L/S dimension is greater than the first L/S dimension.

Abstract: The present application relates to a nitrogen-containing compound. The structural formula of the nitrogen-containing compound is as shown in a Formula 1, in which a ring A and a ring B are each independently selected from a benzene ring or a fused aromatic ring with 10 to 14 ring-forming carbon atoms, and at least one of the ring A and the ring B is selected from the fused aromatic ring with 10 to 14 ring-forming carbon atoms; L is selected from a single bond, a substituted or unsubstituted arylene group with 6 to 30 carbon atoms, and a substituted or unsubstituted heteroarylene group with 3 to 30 carbon atoms; and Het is a substituted or unsubstituted nitrogen-containing heteroaryl group with 3 to 30 carbon atoms. The nitrogen-containing compound of the present application can improve the luminous efficiency of an organic electroluminescent device and the conversion efficiency of a photoelectric conversion device using the nitrogen-containing compound.

Abstract: A method for enhancing aggregation state stability of organic semiconductor (OSC) films includes constructing the OSC film; introducing uniform and discontinuous nanoparticles on a surface of the film or an inside of the film. Electrical properties of the OSC film are not influenced by introducing the nanoparticles. Grain boundary, dislocation, stacking fault, and surface of the film are pinned by the nanoparticles, increasing potential barrier of the aggregation state evolution of the film, and thus enhancing the stability of the aggregation state and greatly improving maximum working temperature and storage lifetime of organic field-effect transistors. Under room temperature storage, morphology of the OSC film introduced with the nanoparticles is difficult to change, so that the stability of electrical properties of organic transistor components prepared from the film is ensured in a high-temperature and atmospheric working environment.

Abstract: A method of p-type doping a carbon nanotube includes the following steps: providing a single carbon nanotube; providing a layered structure, wherein the layered structure is a tungsten diselenide film or a black phosphorus film; and p-type doping at least one portion of the carbon nanotube by covering the carbon nanotube with the layered structure.

Abstract: Provided are a light emitting device includes a first electrode and a second electrode facing each other; an emissive layer disposed between the first electrode and the second electrode and a display device including the same. The emissive layer comprises: a first emission layer disposed on the first electrode and having a hole transporting property; a second emission layer and a third emission layer disposed on the first emission layer; wherein the second emission layer comprises an organic compound having a bipolar transport property and the third emission layer has a composition different from the first emission layer and the second emission layer; wherein the first emission layer, the second emission layer, and the third emission layer comprises a plurality of quantum dots, and wherein the first emission layer, the second emission layer, and the third emission layer are configured to emit light of a same color.

Abstract: The present invention relates to a process for the preparation of a top-gate, bottom-contact organic field effect transistor on a substrate, which organic field effect transistor comprises source and drain electrodes, a semiconducting layer, a cured first dielectric layer and a gate electrode, and which process comprises the steps of: i) applying a composition comprising an organic semiconducting material to form the semiconducting layer, ii) applying a composition comprising a first dielectric material and a crosslinking agent carrying at least two azide groups to form a first dielectric layer, iii) curing portions of the first dielectric layer by light treatment, iv) removing the uncured portions of the first dielectric layer, and v) removing the portions of the semiconducting layer that are not covered by the cured first dielectric layer, wherein the first dielectric material comprises a star-shaped polymer consisting of at least one polymer block A and at least two polymer blocks B, wherein each polymer b

Abstract: An electroluminescent device, a manufacturing method thereof, and a display apparatus are provided. The electroluminescent device includes an anode layer, a light emitting layer, a cathode layer, a hole transport layer located between the anode layer and the light emitting layer, and a electron transport layer located between the cathode layer and the light emitting layer. The electroluminescent device further includes: a first interface modification layer between the light emitting layer and one of the hole transport layer and the electron transport layer; wherein an energy level of the first interface modification layer matches an energy level of the light emitting layer and an energy level of the one of the hole transport layer and the electron transport layer.

Abstract: According to one embodiment, a semiconductor device includes a substrate, a logic circuit provided on the substrate, and a memory cell array provided over the logic circuit that includes a plurality of electrode layers stacked on top of one another and a semiconductor layer provided over the plurality of electrode layers. The semiconductor device further includes a first plug and a second plug provided above the logic circuit and electrically connected to the logic circuit, a bonding pad provided on the first plug, and a metallic wiring layer provided on the memory cell array, electrically connected to the semiconductor layer, and electrically connected to the second plug.

Abstract: An organic light emitting display device may include a substrate, a first pixel electrode on the substrate, a pixel defining layer on the substrate, the pixel defining layer having an opening exposing a portion of the first pixel electrode, a second pixel electrode on the portion of the first pixel electrode exposed by the opening, a hole injection layer on the second pixel electrode, the hole injection layer including a metal oxide, an organic light emitting layer on the hole injection layer; and a common electrode on the organic light emitting layer.

Abstract: A method includes encapsulating a package component in an encapsulating material, with the encapsulating material including a portion directly over the package component. The portion of the encapsulating material is patterned to form an opening revealing a conductive feature in the package component. A redistribution line extends into the opening to contact the conductive feature. An electrical connector is formed over and electrically coupling to the conductive feature.

Abstract: Disclosed herein are devices, systems and methods useful for downhole sensors and electronics suitable for harsh thermal and mechanical environment associated with high-temperature geothermal drilling and high-temperature/high-pressure oil and gas drilling.

Abstract: A display device includes a base layer on which a display area and a non-display area are defined, a circuit layer including a first power electrode and driving circuits, which are disposed in the non-display area, a first planarization layer in which a first opening through which the first power electrode is exposed is defined and which covers the driving circuits, a second power electrode disposed on the first planarization layer to contact the first power electrode that is exposed through the first opening and overlapping at least a portion of the driving circuits, and a second planarization layer disposed on the first planarization layer to cover a portion of the second power electrode and having a groove part in an area overlapping the first planarization layer and the second power electrode in a plan view.

Abstract: A vertical memory device, including: a substrate including a cell array region and an extension region; gate electrodes stacked on each other with a plurality of levels, wherein each of the gate electrodes includes a pad, and wherein the pads disposed on the gate electrodes form at least one staircase structure on the extension region of the substrate; a channel extending in a first direction on the cell array region of the substrate through at least one of the gate electrodes; and dummy gate electrode groups disposed on the extension region of the substrate, wherein the dummy gate electrode groups includes dummy gate electrodes, wherein each of the dummy gate electrodes are spaced apart from a corresponding gate electrode among the gate electrodes stacked at a same level, wherein the dummy gate electrode groups are spaced apart from each other in a second direction.

Abstract: A semiconductor device includes a fin feature in a substrate, a stack of semiconductor layers over the fin feature. Each of the semiconductor layers does not contact each other. The device also includes a semiconductor oxide layer interposed between the fin feature and the stack of the semiconductor layers. A surface of the semiconductor oxide layer contacts the fin feature and an opposite surface of the semiconductor oxide layer contacts a bottom layer of the stack of semiconductor layers. The device also includes a conductive material layer encircling each of the semiconductor layers and filling in spaces between each of two semiconductor layers.

Abstract: A light emitting element includes: a member including a semiconductor layer and an active layer; and at least one ligand bonded to a surface of the member; wherein the at least one ligand includes: a first ligand including two or more functional group chains; and a second ligand having a shorter carbon length than the first ligand.

Abstract: A first organic resin layer is formed over a first substrate; a first insulating film is formed over the first organic resin layer; a first element layer is formed over the first insulating film; a second organic resin layer is formed over a second substrate; a second insulating film is formed over the second organic resin layer; a second element layer is formed over the second insulating film; the first substrate and the second substrate are bonded; a first separation step in which adhesion between the first organic resin layer and the first substrate is reduced; the first organic resin layer and a first flexible substrate are bonded with a first bonding layer; a second separation step in which adhesion between the second organic resin layer and the second substrate is reduced; and the second organic resin layer and a second flexible substrate are bonded with a second bonding layer.