Patents Examined by Auh Tran
  • Patent number: 6011500
    Abstract: A D/A-converter-built-in integrated circuit which is provided with counter responsive to a count mode switching signal to switch between a count mode of repeating a count-up operation and a count mode of repeating a count-down operation, a D/A converter for converting a digital signal to analog form, and control means which, when supplied with a test enable signal for starting a test, causes the counter to start its counting and a selector to select and output a digital signal from the counter and then outputs the count mode switching signal to switch the count mode from the one to the other.
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: January 4, 2000
    Assignees: Mitsubishi Electric Engineering Co., Ltd., Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroshi Noda, Yasushi Fujiwara
  • Patent number: 5990816
    Abstract: The present invention relates to a digital-to-analog converter having a plurality of inputs for digital signals and an output for an analog signal. It comprises a current amplification circuit having an input and an output coupled to the converter output, and a plurality of floating gate MOS transistors corresponding to the plurality of converter inputs and having their source terminals coupled together and to a first reference of potential. The converter has drain terminals coupled together and to the input of the amplification circuit, and has control terminals coupleable, under control from the inputs of the plurality, to different references of potential having selected fixed values.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: November 23, 1999
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alan Kramer, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Philip Leong, Pier Luigi Rolandi, Marco Sabatini
  • Patent number: 5982311
    Abstract: A conversion device includes an A/D converter (8) and a control module for auto-adjustment of the DC component. This module includes an analog comparator (5) which performs a comparison between the analog signal (11) at the input of the A/D converter (8) and a reference voltage (10) produced on the basis of voltages which feed the resistance ladder (9) of the converter. In order that the control does not introduce noise into the signal supplied, the comparator (5) of the control module has a non-linear response with a reduced output/input gain for a range of the differential control signal centered around zero.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: November 9, 1999
    Assignee: U.S. Philips Corporation
    Inventor: Philippe Belin