Abstract: Power efficient performance may be implemented in a hardware accelerator (e.g., a neural processor) comprising hybrid or analog multiply and accumulate (MAC) processing elements (PEs). For example, power consumption may be reduced in neural networks with a rectified linear unit (ReLU) activation layer. A hybrid or analog MAC circuit may be configured with a look-ahead sign detector to dynamically stop computations prior to completion, for example, based on detection of a negative value, which a ReLU activation layer may (e.g., subsequently) convert to zero. The sign of a value may be indicated by a most significant bit (MSB). A controller may provide power and/or clock cycles to an analog to digital converter (ADC) to determine a sign of a value being computed. The sign may be used to selectively complete computations for positive values and selectively terminate computations for negative values, thereby reducing power consumption of the MAC circuit.

Abstract: A method for optimizing computing power of a neural network module, a chip, an electronic device, and a medium are provided. The method includes: obtaining, by the chip, a computational graph of the neural network module having respective operators; performing at least one of adjustments below at least 1 time on a first operator in the computational graph according to specific operation of each operator: counterchanging a position of the first operator with a subsequent operator or a preceding operator in the computational graph, splitting the first operator into more than two identical operators, and inserting a plurality of first operators that are capable of canceling each other out; determining a second operator adjacent to the adjusted first operator in the computational graph according to the specific operations of each operator; and performing merge or cancellation, by the chip, on the adjusted first operator and the second operator.

Abstract: A computational storage device includes a nonvolatile memory configured to store a plurality of embedding tables for a deep-learning recommendation system (DLRS), and a storage controller configured to control an operation of the nonvolatile memory, store a plurality of applications that are off-loaded from a host device executing the DLRS, and support an execution of the DLRS by executing the plurality of applications and performing a plurality of calculations based on the plurality of embedding tables. The storage controller includes a machine learning engine configured to determine a management scheme of at least one embedding table of the plurality of embedding tables and the plurality of applications by analyzing the at least one embedding table and the plurality of applications.

Abstract: There is provided a neural network processor system including: a plurality of neural processing units, including a first neural processing unit and a second neural processing unit, whereby each neural processing unit comprises an array of neural processing core blocks, each neural processing core block comprising a neural processing core; and at least one central processing unit communicatively coupled to the plurality of neural processing units and configured to coordinate the plurality of neural processing units for performing neural network computations. In particular, the first and second neural processing units have a different structural configuration to each other. There is also provided a corresponding method of operating and a corresponding method of forming the neural network processor system.

Abstract: Described are techniques for optimizing a quantum kernel for a support vector machine task. The techniques include receiving, by digital processor, a set of training data, each member of the set representing a data vector (x) and a label (y) identifying the respective member to be part of either a first class or a second class The techniques further include providing, by the digital processor, the quantum kernel comprising a set of unitary operations adapted for acting on a zero state of qubits of a universal quantum circuit The techniques further include performing, by a quantum processor comprising a set of interlinked quantum circuits, an alignment of the quantum kernel using an optimization algorithm based on the set of training data on a primal problem approach of the support vector machine task.

Abstract: Apparatuses, systems, and techniques to determine a number of idle cores of a computing device using a machine learning (ML) model based on a set of processes executed by the computing device are described. One method determines a set of processes executed by the computing device and determines, using an ML model, a number of cores of the computing device to be powered down based at least on the set of processes. The method updates a first mode of the number of cores to a second mode in which the number of cores consumes less power than in the first mode.

Abstract: One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to determining estimated true relaxation times of qubits absent measurement of entire T1 decay times of the qubits. A system can comprise a memory that stores computer executable components; and a processor that executes the computer executable components stored in the memory, wherein the computer executable components are executable to cause, by the processor, one or more energy relaxation measurements, using a pulse generation, at the qubit frequency for a qubit and at a plurality of shifted frequencies for the qubit, and to determine, by the processor, a true average relaxation time of the qubit based on the plurality of energy relaxation measurements.

Abstract: Provided are a neural network acceleration circuit and method. The neural network acceleration circuit includes a data storage module, a data cache module, a computing module, and a delay processing module. The data storage module is configured to store input data required for a neural network computation. The data cache module is configured to cache input data output by the data storage module and required for the neural network computation. The computing module includes multiple computing units configured to compute input data output by the data cache module and required for the neural network computation so that multiple groups of output data are obtained. The delay processing module is configured to perform delay processing on the multiple groups of output data separately and output the multiple groups of output data subjected to the delay processing at the same time.

Abstract: Class imbalance in a training dataset may negatively impact the accuracy of a machine-learning model in classifying rare events that are underrepresented in the training dataset. Training datasets comprising time-series data present a unique challenge. Accordingly, resampling techniques for up-sampling and/or down-sampling a training dataset of time series are disclosed. The up-sampling may respect the temporal correlation of time samples in the time series, while generating synthetic time series that mimic the feature values of time series belonging to the minority class. Down-sampling may be used to fine-tune the ratio of time series belonging to the minority class to the time series belonging to the majority class.

Abstract: Systems and methods to allow for generating a simulated humanoid. The simulated humanoid operates in a simulation space with simulated humanoid having a whole brain emulation module. The whole brain emulation module includes a virtual stimuli input module that is configured to receive or capture stimuli input data. The whole brain emulation module includes an encoder that is configured to translate the stimuli input data into a simulated functional neurodata frame. The whole brain emulation module also includes a brain state module that maintains a current brain state corresponding to a current functional neurodata frame of the simulated humanoid.

Abstract: Hierarchical gradient averaging is performed as part of training a machine learning model to enforce subject level privacy. A sample of data items from a training data set is identified and respective gradients for the data items are determined. The gradients are then clipped. Each subject's clipped gradients in the sample are averaged. A noise value is added to a sum of the averaged gradients of each of the subjects in the sample. An average gradient for the entire sample is determined from the averaged gradients of the individual subjects with the added noise value. This average gradient for the entire sample is used for determining machine learning model updates.

Abstract: A variable curvature bending arc control method for a roll bending machine includes specific steps as follows: collecting and pre-processing data; initializing the network structure, and determining the parameters such as a number of input layer nodes, hidden layer nodes and output layer nodes and other parameters of the back propagation neural network according to the learning sample data; encoding a weight value and a threshold value of a back propagation neural network into individuals in a population according to set coding rules, and initializing the population according to a set population size and a random initialization method; GA-PSO iterative operation; initializing the back propagation neural network parameter; training the back propagation neural network; and an application of the control model.

Abstract: Optimizing route modification using a quantum generated route repository is provided herein. In particular, a classical computing system determines an initial route optimization request comprising at least one initial constraint. The at least one initial constraint includes a starting location and an ending location for a desired route. The classical computing system determines a plurality of initial optimized routes from a plurality of routes based on the at least one initial constraint. The plurality of routes are generated by a quantum computing system. The classical computing system determines a modified route optimization request. The modified route optimization request includes at least one modified constraint. The classical computing system determines a plurality of modified optimized routes from the plurality of routes based on the at least one modified constraint. The plurality of routes are previously generated by the quantum computing system.

Abstract: A non-transitory computer-readable recording medium storing an analysis program that causes a computer to execute a process, the process includes combining an artificial intelligence (AI) system with a plurality of deep learning models; and creating accuracy reference information for the plurality of deep learning models in a space in which accuracy evaluation information is projected in multiple dimensions, by using discrete threshold value evaluations, for the AI system.

Abstract: A method and system of discovering materials for use in carbon dioxide separation includes extracting references to chemical molecules from online sources. The extracted references are encoded into chemical formulas. Molecular properties are calculated from the encoded chemical formulas. Features are extracted from the chemical formulas. Molecular properties of predicted molecular structures are predicted through a machine learning engine. The predicted molecular properties are based on the calculated molecular properties and extracted features. Target properties for predicted molecular structures are defined. Synthesized molecular structures are generated. The synthesized molecular structures include predicted molecular properties satisfying the defined target properties.

Abstract: The present disclosure includes a method for training a sequence mining model. In the method, a first sequence sample in a target service scenario is obtained. A tag status of the first sequence sample is obtained, the tag status of the first sequence sample indicating a proportion of the first sequence sample that has corresponding tag information. A sub-model from a sequence mining frame is selected according to the tag status to construct the sequence mining model. Also, the sequence mining model is trained by using the first sequence sample. The sequence mining frame includes a first sub-model configured to obtain a latent representation, a second sub-model configured to determine the target tag information when the tag status meets a first condition, and a third sub-model being configured to determine the target tag information when the tag status meets a second condition.

Abstract: Embodiments of systems and methods for unsupervised data characterization utilizing drift are described. In some embodiments, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: provide input data to an Artificial Intelligence (AI) or Machine Learning (ML) drift detector, where the AI/ML drift detector is associated with a characteristic undetectable in the input data; and receive a drift confidence score from the AI/ML drift detector.

Abstract: Methods and systems to correct low-resolution measurements corresponding to unobservable high-resolution measurements by introducing variation in the plurality of low-resolution measurements through iteratively computing, until a termination criteria is met, perturbed values for the low-resolution measurements. The perturbed values have a higher resolution than another resolution of the low-resolution measurements. A distribution test may afterwards be performed on the perturbed values that remain after the termination criteria is met.

Abstract: The present invention discloses a graph partitioning system for running neural networks on resource constrained hardware systems. The graph partitioning system used for partitioning a neural network graph into a series of sub-graphs and further allow the multiple sub-graphs to be executed in available hardware subsystems. The system based on cost function as estimated computation time and memory bandwidth of partitioned sub-graphs. The graph partitioning system is a cycle estimation model of hardware that can run fast and parameterize memory latency. The graph partitioning system supports heterogeneous partition for different type accelerators such as CPU, GPU, ASIC. The present invention also discloses a method for partitioning neural network graph in to series of sub-graphs.

Abstract: Quantum Mechanics Instruction Production (QMIP) systems, methods, and computer-readable media are described. In some implementations, the QMIP system may comprise an input/output module, a database library module, a tradeoff module, a printer module, a samples analyzer module, and a test bench module. Some implementations can include a Nosanow Fermion and Boson Wave Module (or Nosanow Fermion Wave Module), a Grand Free Energy Module, an artificial intelligence module, a chemical bench module, a simulation module, and a metrology and interferometry module. The QMIP system can be programmed and configured to implement a quantum computer and algorithms that are executed on the quantum computer system, which notably, benefit from improved coherence and stability. In some implementations, the QMIP system may be programmed and configured to design new materials such as superconductors, superfluids, photovoltaics, and new drug therapies to treat disease.