Patents Examined by Ayaz R. Scheikh
  • Patent number: 5889972
    Abstract: A bus to bus bridge deadlock prevention system detects and resolves a deadlock condition in a bus to bus bridge. In a PCI protocol application of the present invention, the system detects a retry of a request by a master device. The request is masked for a delay period before the request is allowed to attempt to pass through a PCI to PCI bridge. If the request results in a further retry, the delay period length is changed and the request is masked for the different delay period. Successive retry requests are masked for different delay periods until the deadlock condition is resolved. The system adapts to the deadlock condition by repeatedly changing the delay period until the deadlock condition is resolved and the bridged busses resume normal operation.
    Type: Grant
    Filed: March 25, 1997
    Date of Patent: March 30, 1999
    Assignee: Adaptec, Inc.
    Inventor: Donald N. Allingham