Abstract: The present disclosure provides a pixel circuit, a pixel driving method and a display device. The pixel circuit includes a driving circuit, an energy storage circuit and a switch control circuit. A first end of the energy storage circuit is coupled to a control end of the driving circuit, a second end of the energy storage circuit is coupled to a first end of the driving circuit via the switch control circuit, and the energy storage circuit is configured to store a voltage. The switch control circuit is configured to control the second end of the energy storage circuit to be electrically coupled to a voltage application end or the first end of the driving circuit under the control of a light-emission control signal from a light-emission control line. The driving circuit is configured to generate a driving current in accordance with a voltage between the control end and first end of the driving circuit.

Abstract: The disclosure discloses a timing controller board, a main control board, a display device and a detection method thereof. The timing controller board outputs a second level signal transmitted by a first fixed potential signal pin to the main control board through a detection circuit when a first data signal pin outputs a first level signal; the main control board loads a second potential signal transmitted by a second fixed potential signal pin to a second data signal pin and a clock signal pin through a switching circuit upon receiving the second level signal, to cause the main control board to stop sending a data signal to the timing controller board through the second data signal pin and stop sending a clock signal to the timing controller board through the clock signal pin.

Abstract: Provided are a display substrate, a preparation method thereof, and a display apparatus. The display substrate includes a substrate, an array structure layer disposed on the substrate, a plurality of emitting units and a plurality of ultrasonic transducers disposed at intervals on a side of the array structure layer away from the substrate, wherein the ultrasonic transducers are disposed between adjacent emitting units, and the array structure layer includes a transducer drive circuit connected to the ultrasonic transducer, and the transducer drive circuit is configured to control the ultrasonic transducer to transmit ultrasonic waves and receive voltage signals generated by the ultrasonic transducer receiving echoes.

Abstract: A gate clock generator of a display device includes a carry clock generator configured to sequentially generate N carry clock signals based on a carry-on clock signal and a carry-off clock signal, a scan clock generator configured to generate N scan clock signals based on a scan-on clock signal and a scan-off clock signal, and a sensing clock generator configured to generate N sensing clock signals based on a sensing-on clock signal and a sensing-off clock signal.

Abstract: An emission driver includes a plurality of stages. A stage of the plurality of stages receives a start signal, a first clock signal, a second clock signal, a protection signal, a first gate power voltage and a second gate power voltage and outputs an emission signal. The stage of the plurality of stages includes a pull-up switching element connected between a first gate power voltage terminal which receives the first gate power voltage and an emission signal output terminal which outputs the emission signal, a pull-down switching element connected between a second gate power voltage terminal which receives the second gate power voltage and the emission signal output terminal and a protection switching element which applies the first gate power voltage to a control electrode of the pull-down switching element in response to the protection signal.

Abstract: An interpolated flat-panel display comprises a display substrate, pixel controllers disposed in a controller array over the display substrate, and pixels disposed in a pixel array over the display substrate. Each pixel controller is connected to one or more control lines and is operable to output pixel information. Each pixel is operable to emit light in response to pixel information received from a pixel controller. The pixel array is larger than the controller array, each pixel is connected to at least one pixel controller, and at least some pixels are interpolated pixels connected to at least two pixel controllers and are operable to emit light in response to pixel information received from the at least two pixel controllers.

Abstract: A sensor hub for collecting sensor data during a parachuting or wing-suite event is described herein. In some instances, the sensor hub may include a sensor hub housing, the sensor hub housing including a first cavity that houses a power supply and a communication unit and a second cavity that houses a location sensor and an orientation sensor, wherein the communication unit is configured to share the location sensor and the orientation sensor with a second sensor hub and a helmet that attaches to the sensor hub housing.

Abstract: A display device includes: first and second substrates with a liquid crystal therebetween; pixel electrodes and a common electrode provided to the first or second substrate; a light source including first to third light sources; and an image processor generating a signal to be provided to each pixel based on an input image signal. A frame period includes a first subframe period in which the first light source is on, a second subframe period in which the second light source is on, a third subframe period in which the third light source is on, and a fourth subframe period in which one or more of the first to third light sources are on. The image processor divides a gradation value into two values smaller than the gradation value, allocates one of the two values to the fourth subframe period, and allocates the other value to the other first subframe period.

Abstract: Embodiments of the present disclosure relate to a data driving circuit and a display device. In the process of a display device converting an image data received from an outside into a data signal supplied to a data driving circuit, a final color temperature target represented by the image is variably set based on a panel driving current, so that the power consumption of a display panel displaying an image can be minimized. In addition, since the final color temperature target is varied, the luminance of the image and the user's recognition level are maintained constant, thereby improving the efficiency of the display device.

Abstract: A light-emitting unit includes a multilayer circuit structure, a plurality of display pixels, and at least one compensation pixel. The multilayer circuit structure includes a top circuit layer and a bottom circuit layer. The display pixels are arranged into an N×M pixel array along a first direction and a second direction. Each of the display pixels includes a plurality of sub-pixels. The sub-pixels are disposed on the top circuit layer of the multilayer circuit structure. The compensation pixel is disposed on the top circuit layer of the multilayer circuit structure and electrically bonded to the multilayer circuit structure. The compensation pixel is located between the display pixels. The number of the compensation pixel is less than the number of the display pixels. Extension lines in the first direction and the second direction do not pass through the compensation pixel. A display apparatus is also provided.

Abstract: Systems, methods, and apparatus for presenting information and performing a task using an electronic device. In some aspects, a device shows content items when a gaze or a shaking act plus a gaze are detected. In some aspects, a device performs a task when a name, a code, and the task are detected in voice input. In some aspects, a user communicates with a selected vehicle via a user device.

Abstract: A light-emitting driving circuit includes a driving sub-circuit, a control sub-circuit, a data writing sub-circuit and a compensation sub-circuit. The control sub-circuit is configured to initialize voltages of a first node and a control terminal of the driving sub-circuit in response to a second scan signal. The data writing sub-circuit is configured to write a data signal into a first terminal of the driving sub-circuit in response to a first scan signal. The driving sub-circuit is configured to output, from a second terminal of the driving sub-circuit, the data signal and a compensation signal. The compensation sub-circuit is configured to transmit the data signal and the compensation signal to the first node in response to the first scan signal, and adjust the voltage of the control terminal according to the data signal, the compensation signal, the initialized voltages of the first node and the control terminal.

Abstract: Embodiments of the present disclosure relate to a display device comprising a display panel on which a plurality of gate lines, a plurality of data lines, a plurality of reference voltage lines, and a plurality of subpixels are disposed, a gate driving circuit providing scan signals to the plurality of gate lines, a data driving circuit providing data voltages to the plurality of data lines, and including at least one reference voltage switch for controlling reference voltages supplied to the plurality of reference voltage lines, and a timing controller controlling the gate driving circuit and the data driving circuit, and maintaining the reference voltage of the reference voltage line at a level of turning off a light emitting element while at least one scan transistor disposed on the plurality of subpixels is turned off before a sensing process for sensing a characteristic value of the plurality of subpixels is performed.

Abstract: A gate driver circuit can include a plurality of stage circuits, in which each of the plurality of stage circuits supplies a gate signal to gate lines arranged in a display panel, and includes an M node, a Q node, a QH node, a QB node, a line selector, a Q node controller, a Q node and QH node stabilizer, an inverter, a QB node stabilizer, a carry signal output circuit portion, a gate signal output circuit portion, and a Q node bootstrapper, in which the Q node bootstrapper is connected between the carry signal output circuit portion and the gate signal output circuit portion, or the gate signal output circuit portion is connected between the carry signal output circuit portion and the Q node bootstrapper.

Abstract: A pixel array substrate includes a base, pixel structures, first bonding pads, first wirings, and a first testing element. The pixel structures are disposed on an active area of a first surface of the base. The first bonding pads are disposed on a peripheral region of the first surface. Each of the first wirings is disposed on a corresponding first bonding pad, a first sidewall of the base, and a corresponding second bonding pad. The first testing element is disposed on the active area of the first surface and has a first testing line. The first testing line is electrically connected to at least one of the first bonding pads, and an end of the first testing line is substantially aligned with an edge of the base.

Abstract: A display panel including a pixel circuit substrate, a planarization layer, a plurality of bonding pads, a plurality of light-emitting devices, a plurality of auxiliary electrodes, and a reflective structure layer is provided. The pixel circuit substrate has a plurality of signal lines. The planarization layer covers the signal lines. The bonding pads are disposed on the planarization layer and are electrically connected to the signal lines. The light-emitting devices are electrically bonded to the bonding pads. The auxiliary electrodes are disposed between the bonding pads. The reflective structure layer is disposed between the light-emitting devices and overlaps at least part of the auxiliary electrodes and the bonding pads. A method of fabricating the display panel is also provided.

Abstract: An electronic device includes: a video signal processing unit that receives a video signal and outputs a predetermined type of signal; an arithmetic processing unit that transfers a correction segment data corresponding to a different segment between a current unevenness correction data and a previous unevenness correction data; and an unevenness correction unit that corrects the predetermined type of signal based on the current unevenness correction data.

Abstract: A display device including: a display panel including a pixel connected to a first scan line, second scan line, and data line, the pixel including: a first switch connected to the first scan line; a second switch connected to the second scan line; and a light emitting element; a low-frequency driving controller to output a first power control signal having a first level in a first mode and a second power control signal having a second level in a second mode; a scan driver including first and second scan drivers to drive the first and second scan lines, wherein one of the first and second scan drivers operates in the second mode; and a data driver to operate in the second mode in response to the power control signal having the second level, wherein the data driver operates at a frequency lower than a reference frequency in the second mode.

Abstract: A clock data recovery circuit includes the following elements: a phase detector for outputting a phase adjustment signal by comparing a clock signal of a first node and an input signal; a charge pump for adjusting a charge amount of a second node according to the phase adjustment signal; a first switch including one end coupled to the second node and including another end coupled to a third node; a second switch including one end which receives a bias voltage and including another end coupled to the third node; a capacitor including a first electrode coupled to the third node; third switches; and voltage control oscillators including control terminals coupled to the third node and including output terminals coupled to the first node through the third switches.

Abstract: A display panel includes a display area and a first peripheral area located around the display area. A first gate driver is provided in the first peripheral area. The display panel is further provided with a plurality of first driving signal lines and a plurality of second driving signal lines. The plurality of first driving signal lines are arranged in a different layer from a layer in which the plurality of second driving signal lines are located. The m-th first driving signal line of the plurality of first driving signal lines and the k-th second driving signal line of the plurality of second driving signal lines are both electrically connected, in the first peripheral area, to an m-th output terminal of the first gate driver, where m is an integer greater than or equal to 1 and k is also an integer greater than or equal to 1.