Abstract: Techniques for debugging of a collection of instructions executed by a computing system including a set of actors are described herein. A first sub-set of actors from the set of actors to be monitored for debugging and one or more error condition associated with the collection of instructions may be identified. A set of indications including indications of messages processed by the actors, indications of associated actor states prior to processing of the messages, and indications of associated actor states subsequent to processing of the messages may be received from the sub-set of actors. It may then be determined that a first actor of the sub-set of actors has satisfied the error condition. Based at least in part on the set of indications, one or more messages associated with satisfaction of the error condition may then be identified, for example for re-processing and debugging.

Abstract: Micro-execution is the ability to run any code segment in isolation. Implementations for micro-execution of code segments are described. A test engine determines an effective address of a memory operation of an instruction of an executable program. The test engine determines, prior to performing the memory operation and based on a memory policy, that the effective address is to be replaced with a replacement address. Based on determining that the effective address is to be replaced, the test engine allocates the replacement address and executes the instruction based on the allocated replacement address.

Abstract: A method, apparatus, and/or computer program product creates a virtual resource package. Metadata related to a machine is captured, where the machine is a physical machine and/or a virtual machine. A constraint definition describing a configuration constraint of the machine is generated based on the captured metadata. A disk image file of the at least one machine, the captured metadata and the generated constraint definition are packaged to generate the virtual resource package.

Abstract: A system and method can support transaction processing in a middleware environment. A processor, such as a remote method invocation stub in the middleware environment, can be associated with a transaction, wherein the transaction is from a first cluster. Then, the processor can handle a transactional request that is associated with the transaction, wherein the transactional request is to be sent to the first cluster. Furthermore, the processor can route the transactional request to a said cluster member in the first cluster, which is an existing participant of the transaction.

Abstract: Embodiments of the present invention provide a system and methods for detecting power bugs. In one embodiment, a computer-implemented method for analyzing a computer code includes generating a control flow graph for at least a portion of the computer code at a processor. The method further includes identifying power bugs by traversing the control flow graph if the control flow graph exits without performing a function call to deactivate power to any component of a device configured to execute computer executable instructions based on the computer code after performing a function call to activate power.

Abstract: Technologies for shadow stack support for legacy guests include a computing device having a processor with shadow stack support. During execution of a call instruction, the processor determines whether a legacy stack pointer is within bounds and generates a virtual machine exit if the legacy stack pointer is out-of-bounds. If not out-of-bounds, the processor pushes a return address onto the legacy stack and onto a shadow stack protected by a hypervisor. During execution of a return instruction, the processor determines whether top return addresses of the legacy stack and the shadow stack match, and generates a virtual machine exit if the return addresses do not match. If the return addresses match, the processor pops the return addresses off of the legacy stack and off of the shadow stack. The stack out-of-bounds and the stack mismatch virtual machine exits may be handled by the hypervisor. Other embodiments are described and claimed.

Abstract: Methods and systems for providing a communication path are disclosed. Information can be received via a first communication session based on a first messaging protocol. The first communication session can be terminated at a virtual machine of a group of virtual machines. A dynamically bound communication path to a resource can be selected based on a dynamically reconfigurable routing table for the group of virtual machines. A second communication session can be initiated, at the virtual machine, via the selected dynamically bound communication path. The information can be transmitted to the resource via the second communication session based on a second messaging protocol.

Abstract: Techniques for synchronizing a honey network configuration to reflect a target network environment are disclosed. In some embodiments, a system for synchronizing a honey network configuration to reflect a target network environment includes a device profile data store that includes a plurality of attributes of each of a plurality of devices in the target network environment; a virtual machine (VM) image library that includes one or more VM images; and a virtual clone manager executed on a processor that instantiates a virtual clone of one or more devices in the target enterprise network using a VM image selected from the VM image library that is customized based on one or more attributes for a target device in the device profile data store.

Abstract: Compiler based obfuscation is described. To protect portions of a code project with obfuscations, the code is modified within a compiler to produce one or more modifications that obfuscate the code as part of a compilation process. A compiled version of the code is generated having the modifications that are produced within the compiler. In one approach, the compiler is configured to consume an obfuscation description that indicates portions of the code to protect and specifies the modifications to make to the indicated portions. Various different modifications of code may be performed during the compilation process to implement corresponding obfuscation features. For example, the modifications made within a compiler may include, but are not limited to, modifications designed to enable tamper detection, anti-debugging, and/or encryption of the code.

Abstract: Methods, apparatuses, and systems that allow a microprocessor to optimally select an assist unit (co-processor) to reduce completion times for completing processing requests to execute functions. The methods, apparatuses, and systems include assist unit hardware, assist unit management software, or a combination of the two to optimally select the assist unit for completing a specific processing request. In optimally selecting an assist unit, the methods, apparatuses, and systems calculate estimated times for completing the processing request with conventional means and with assist units. The times are then compared to determine the fastest time for completing a specific processing request.

Abstract: A system includes a plurality of information processing devices and a management device configured to manage execution of jobs performed by the plurality of information processing devices. The management device detects any one of the plurality of information processing devices which is executing a first job, at a predetermined time, and determines whether a second information processing device different from the first information processing device is able to be allocated to a second job which is scheduled to use the first information processing device being used by the first job after the predetermined time, among the plurality of information processing devices. The management device modifies an execution schedule of the jobs such that the second job is executed using the second information processing device when it is determined that the second information processing device is able to be allocated to the second job.

Abstract: A software test apparatus and a software test method and a computer readable medium thereof are provided. The software test apparatus stores a software testing program, an under-tested code, a plurality of basic test benches and a plurality of candidate test benches. The under-tested code includes a hard-to-detect code and the hard-to-detect code has at least one hard-to-detect section. The software test apparatus runs the software testing program to execute the following operations: parsing the hard-to-detect code to generate a condition-statement tree; based on the basic test benches and the condition-statement tree, using a support vector machine (SVM) to establish a support vector regression (SVR) predictor; and applying the SVR predictor to choose a best candidate test bench from the candidate test benches.

Abstract: Methods, systems, and computer program products are provided that enable incremental compilation of source code. Attributes of an intermediate language (IL) representation and a compiled representation of a source code are stored. Modified source code that is a revised version of the first source code is received. An IL representation of the modified source code is generated. Attributes of the revised intermediate IL and the stored attributes of the IL representation are compared to determine a first set of functions changed in the modified source code. A second set of functions in the first source code is determined that includes functions affected the determined first set of functions. The first and second sets of functions are compiled to generate a set of compiled functions. Compiled versions of the first and second sets are replaced in the compiled representation of the first source code with the set of compiled functions.

Abstract: Described are techniques for testing software. The techniques may include identifying, at a first point in time, first code that has been modified, identifying, using first mapping information, a testing set of one or more test cases wherein the first mapping information identifies each test case of the testing set as a test case used to test the first code, running the testing set, generating coverage information in accordance with executing; analyzing the coverage information, generating second mapping information in accordance with said analyzing, and updating the first mapping information in accordance with the second mapping information.

Abstract: A controlling method realized by a computer connected to a plurality of physical devices in which respective virtual machines (VMs) are operated and a process device which is connected to the plurality of physical devices with a plurality of routes and in which a plurality of duplication process VMs for executing a duplication process of duplicating data used by the plurality of VMs to a memory device, the method includes: acquiring loads of the plurality of routes and percentages of completion of the duplication process executed by the plurality of duplication process VMs; and, when incompletion of the duplication process using the selected route within a regulated time is detected, moving any of the duplication process VMs using the selected route to any of the plurality of physical devices from the process device.

Abstract: A new approach is proposed virtual machines (VMs) accessing remote storage devices over a network via non-volatile memory express (NVMe) controllers to migrate live from a current host to a destination host. A first virtual NVMe controller running on a first physical NVMe controller enables a first VM running on the current host to perform storage operations to logical volumes mapped to the remote storage devices over the network as if they were local storage volumes. During VM migration, the current host puts the first virtual NVMe controller into quiesce state and saves an image of its states. A second virtual NVMe controller is created on a second physical NVMe controller using the saved image, which is configured to serve a second VM on the destination host. The second virtual NVMe controller resumes the storage operations to the remote storage devices without being interrupted by the VM migration.

Abstract: A method (which can be computer implemented) for inferring whether at least a first relationship exists between at least first and second entities includes the steps of applying a first assessor to obtain a first confidence level pertaining to putative existence of said at least first relationship between said at least first and second entities, applying a second assessor to obtain a second confidence level pertaining to putative existence of said at least first relationship between said at least first and second entities, and combining said first and second confidence levels to obtain an overall inference whether said at least first relationship exists between said at least first and second entities.

Abstract: A method for operating a lock in a computing system having plural processing units and running under multiple runtime environments is provided. When a requester thread attempts to acquire the lock while the lock is held by a holder thread, determine whether the holder thread is suspendable or non-suspendable. If the holder thread is non-suspendable, put the requester thread in a spin state regardless of whether the requester thread is suspendable or non-suspendable; otherwise determines whether the requester thread is suspendable or non-suspendable unless the requester thread quits acquiring the lock. If the requester thread is non-suspendable, arrange the requester thread to attempt acquiring the lock again; otherwise add the requester thread to a wait queue as an additional suspended thread. Suspended threads stored in the wait queue are allowable to be resumed later for lock acquisition. The method is applicable for the computing system with a multicore processor.

Abstract: A micro-architecture may provide a hardware and software co-designed dynamic binary translation. The micro-architecture may invoke a method to perform a dynamic binary translation. The method may comprise executing original software code compiled targeting a first instruction set, using processor hardware to detect a hot spot in the software code and passing control to a binary translation translator, determining a hot spot region for translation, generating the translated code using a second instruction set, placing the translated code in a translation cache, executing the translated code from the translated cache, and transitioning back to the original software code after the translated code finishes execution.

Abstract: An information processing apparatus provided with an extension unit for performing control to download and install an extension program for extending functionality, the extension unit comprises: a first control unit that performs control to download from an external server an introduction program that provides information about the extension program which can be downloaded, and installs the introduction program; an obtaining unit that obtains, from the installed introduction program, information about the extension program; a provision unit that provides a screen for displaying the obtained information about the extension program and for receiving an instruction to install the extension program; and a second control unit that, in response to the instruction by a user via the screen, performs control to use key information included in the obtained information to download and install the extension program.