Abstract: A method of comparing an input pattern with a memory pattern includes the steps of loading a representation of said input pattern into cells in an input layer; loading a representation of said memory pattern into cells in a memory layer; loading an initial value into cells in an intermediate layers between said input layer and said memory layer; comparing values of cells in said intermediate layers with values stored in cells of adjacent layers; updating values stored in cells in said intermediate layers based on said step of comparing; and mapping cells in said memory layer to cells in said input layer.
Type:
Grant
Filed:
March 29, 2004
Date of Patent:
September 9, 2008
Assignee:
Applied Neural Technologies Limited of Woodbourne Hall
Abstract: During software development, a multichip module is used which encloses a target chip and a development chip in one package. A CPU of the development chip fetches instructions from a flash memory in the chip to execute them, and accesses RAM and peripheral circuits in the chip. For motor control circuits that exist only in the target chip, the CPU accesses them via serial communication. When the one-chip microcomputer operates alone, its CPU switches a switching circuit to a JTAG interface side to actuate a motor control circuit via internal serial communication.
Abstract: The response of linear and non-linear systems to an arbitrary pulse train is modeled for efficient and accurate circuit simulation. First, a harmonic balance analysis is performed for a system incorporating linear and non-linear components. Then, the even and odd frequency components of the harmonic balance result are separated and interpolated. Finally, the resulting interpolated components are combined to generate the frequency domain positive step response and the frequency domain negative step response of the system. These resulting frequency domain step responses are utilized to generate a low order pole/zero model of the step responses. The pole/zero model can then be used to efficiently and accurately model the response of the system to an arbitrary sequence of positive and negative going pulses.
Abstract: A passive macromodel for lossy, dispersive multiconductor transmission lines uses a multiplicative approximation of the matrix exponential known as the Lie product. The circuit implementation of the macromodel is a cascade of elementary cells, each cell being the combination of a pure delay element and a lumped circuit representing the transmission line losses. Compared with passive rational macromodeling, the Lie product macromodel is capable of efficiently simulating long, low-loss multiconductor transmission lines while preserving passivity. This result is combined with transmission line theory to derive a time-domain error criterion for the Lie product macromodel. This criterion is used to determine the minimum number of cells needed in the macromodel to assure that the magnitude of the time-domain error is less than a given engineering tolerance.
Type:
Grant
Filed:
October 19, 2004
Date of Patent:
July 15, 2008
Assignee:
International Business Machines Corporation
Abstract: A method is provided to match an unknown data point with a known data point contained in a multi-dimensional data structure. The method may include receiving data from any multi-dimensional source where a query may be used to locate specific data points within that source. The method receives a number of inputs, including a Euclidean error distance and a number of reference points to use. Furthermore, the method determines optimal reference points to locate a relatively small number of data points within the data structure that possibly match the unknown point. Once possible match points are located, the method then determines the unknown point's match.
Type:
Grant
Filed:
June 30, 2005
Date of Patent:
July 8, 2008
Assignee:
Microsoft Corporation
Inventors:
Marc Daskalovic, Eugene Zarakhovsky, Christian Eric Schrock
Abstract: A general purpose processor architecture (methods and apparatuses) that can discern all subsets of a serial data stream which fulfill an arbitrarily complex reference pattern. The invention comprises an ordered set of Detection Cells conditionally interconnected according to the reference pattern and operationally controlling one another's states through the network. The invention preferably includes a Host Interface to enable reporting of Results from a search session as well as the input and control of reference patterns and source data.