Abstract: A partial response (PR) waveform generator generates a digital value sequence of an expected PR waveform based on the output of a soft-decision Viterbi detector included in, for example, a first-stage decoder unit incorporated in an iterative decoder. The generator also generates flag information indicative of whether reliability of the digital value sequence is low or high, in parallel with the generation of the digital value sequence. An error detector detects error values in a PR equalized sample value sequence, needed for feedback control of a control target, using the digital value sequence of the expected PR waveform as a digital value sequence of a reference waveform. An error output controller controls the output of the error values detected by the error detector in accordance with the state of the flag information generated by the generator.

Abstract: Techniques are provided to support soft handoff in a frequency hopping OFDMA system. Each sector concurrently supports “non-handoff” users and “soft-handoff” users. A non-handoff user communicates with only one sector, and a soft-handoff user communicates with multiple sectors simultaneously. Non-handoff users are assigned traffic channels by their sole sectors, and soft-handoff users are assigned traffic channels by their “serving” sectors. For each sector, the traffic channels assigned to the non-handoff users are orthogonal to one another and may or may not be orthogonal to the traffic channels assigned to the soft-handoff users. Each sector processes its received signal and recovers the data transmissions from the non-handoff users of that sector. Each sector then estimates the interference due to the non-handoff users and cancels the interference from the received signal. Each sector further processes its interference-canceled signal to recover the data transmissions from the soft-handoff users.

Abstract: A reconfigurable communication transmitter core includes a digital pulse-shaping filter to perform pulse-shaping operations upon a digital modulated signal and a finite state machine to controls operation and reconfiguration of the digital pulse-shaping filter. A first memory stores coefficients and a second memory stores data. A multiplier multiplies a data value stored in the second memory with a corresponding coefficient value stored in the first memory. An adder adds each multiplication product from the multiplier with the content of an accumulation register wherein the accumulation register accumulates the sum from the adder. A rounding unit rounds off the content of the accumulation register and to provide rounded-off content as an output of the reconfigurable communication transmitter core. The finite state machine reconfigures a look-up table value set in the first memory, the first memory having pre-stored therein pulse shaped filtered waveforms.

Abstract: A method for reducing a propagation delay of a digital filter. The digital filter has an input path and an output path and includes a set of delay elements and a number of taps. The taps couples the input path to the output path. Each of the taps includes a coefficient, a multiplier and an adder. Each of the delay elements is disposed between two adjacent taps. The delay elements are placed in both the input path and the output path of the digital filter, such that the digital filter has fewer delay elements in the input path than a direct-form digital filter having the same number of taps in a direct-form structure and has fewer delay elements in the output path than a transposed-form digital filter having the same number of taps in a transposed-form structure, and such that the digital filter has same transfer function as the direct-form digital filter and the transposed-form digital filter.

Abstract: Systems and techniques are disclosed relating to communications. The systems and techniques involve spread-spectrum communications using a scheduler, or similar component, configured to maintain a plurality of spreading sequence assignments and a plurality of available spreading sequences each being orthogonal to the assigned spreading sequences. The scheduler may also be configured to select a spreading sequence from a group of the available spreading sequences having the same length, the selected spreading sequence being generated from a block of codes and being selected based on the number of the available spreading sequences that can be generated using the same block of codes.

Abstract: A circuit and method for correcting timing of a received phase modulated signal. The method uses k most recently received data bits as an address for a lookup table 60. The lookup table includes reconstructed waveforms from which a timing weighing factor is determined. The received PM from time t1 is delayed, phase adjusted, and multiplied by the timing weighing factor, the product of which is used by a timing adjust block 50 to adjust timing of the PM signal at a time after t1. The circuit inputs a PM signal to a timing adjust block 50. The output is split between a matched filter 54 and a loop phase shifter 78. The matched filter feeds alternating I and Q bits into a register 58 that holds k data bits, which are used as an address for a lookup table 60. The output of the lookup table 60 becomes a timing weighing figure, which is multiplied 74 with an output of the loop phase shifter 78 and then input into the timing adjust block 50 for adjusting timing of a PM signal.

Abstract: A digital circuit and method for forming number streams for frequency and/or phase comparison of digital or digitized signals, referred to herein as clock signals, where typically one of the clock signals is a known clock signal and another of the clock signal is an unknown clock signal. The unknown clock signal may be derived, for example, from a communications signal. The rate of the unknown clock signal may exceed the rate of the known clock signal. In an exemplary embodiment, an “alias” value (e.g., an integer 1, 2, 3, etc.) is applied to the circuit as an indication of the expected frequency range of the unknown clock signal. The number stream is formed accordingly.

Abstract: A system and method of automatic gain control (AGC) processing of digital signals using Block AGC to acquire the signal and sample-by-sample AGC to track the signal.

Abstract: The invention provides methods and apparatus for multiple user detection (MUD) processing that have application, for example, in improving the capacity CDMA and other wireless base stations. One aspect of the invention provides a multiprocessor, multiuser detection system for detecting user transmitted symbols in CDMA short-code spectrum waveforms. A first processing element generates a matrix (hereinafter, “gamma matrix”) that represents a correlation between a short-code associated with one user and those associated with one or more other users. A set of second processing elements generates, e.g., from the gamma matrix, a matrix (hereinafter, “R-matrix”) that represents cross-correlations among user waveforms based on their amplitudes and time lags. A third processing element produces estimates of the user transmitted symbols as a function of the R-matrix.

Abstract: Described is a transmission system for transmitting a multicarrier signal from a transmitter (10) to a receiver (20). The multicarrier signal comprises a plurality of subcarriers. The receiver (20) comprises a channel estimator (28) for estimating amplitudes of the subcarriers and for estimating time derivatives of the amplitudes. The receiver (20) further comprises an equalizer (24) for canceling intercarrier interference included in the received multicarrier signal in dependence on the estimated amplitudes and derivatives (29). The channel estimator (28) and/or the equalizer (24) are arranged for exploiting an amplitude correlation between the derivitives of different subcarriers. By making use of this correlation the complexity of the receiver (20) can be substantially reduced.

Abstract: The invention provides a method and apparatus for achieving timing synchronization during signal acquisition and for achieving frequency synchronization in a digital communication receiver after signal acquisition. The invention operates by performing multiple correlations of a received signal, each correlation performed over an symbol interval and correlating the received signal in the symbol interval with a sinusoid of an expected frequency. The correlations are combined to determine a peak and energy, and if the peak to energy ratio is above a threshold, the symbol timing and frequency offset is estimated.

Abstract: A cell search method is disclosed in which autocorrelation patterns are subtracted from a correlation value profile. When carrying out a cell search with respect to a correlation value profile, the peak timing of a first base station is first detected and the scrambling code of this base station is identified. A path search process is then carried out using this timing and scrambling code to detect timings at which multipath occur. Autocorrelation patterns that center on the obtained frame timings and autocorrelation patterns that center on multipath are next generated and a process is performed to subtract these autocorrelation patterns from the correlation value profile. This process enables the rapid detection of peak produced by a second base station.

Abstract: A method is provided for time control of data transmission from a first module to a further module. An electronic system also is provided having a first module from which data is sent via a connecting line to a further module, which has a reference signal line via which a reference signal is transmitted from the further module to the first module, which reference signal is chosen as a function of the timing of the data received by the further module, with respect to a clock signal received by the further module. The reference signal has a bit sequence which corresponds to a bit sequence which was received by the further module via the connecting line from the first module.

Abstract: The tap weights of an equalizer are initialized in response to a received relatively short training sequence, and new tap weights for the equalizer are thereafter successively calculated in response to relatively long sequences of received symbols and corresponding sequences of decoded symbols. These new tap weights are successively applied to the equalizer.

Abstract: An apparatus and method for estimating the angle-of-arrival. The apparatus includes a de-spreading unit, a multipath suppressor, an AOA estimator. The de-spreading unit receives and de-spreads the first and the second spread signals, and outputs the first and the second despread signals. The multipath suppressor receives the first and the second despread signals, suppresses the multipath effects and accordingly outputs the first and the second de-noise signals. The AOA estimator receives the first and the second de-noise signals and outputs the angle-of-arrival accordingly.

Abstract: A polyphase filter of order x·N that builds N allpass filters of order x·N has a structure of an allpass filter of order x comprising delay elements with a delay of 1 and at least one multiplier, wherein all delay elements with a delay of 1 are replaced by delay elements with a delay of N and the sampling rate of fS?=fs/N with fs being the sampling rate of the input signal. Preferably the multiplier included in the structure of the allpass filter of order x comprises N-time multiplex multiplication coefficients that are used in a predetermined order.

Abstract: A method and an equalizer circuit equalize signals transmitted on a line having an attenuation. The equalizer circuit includes: an analogical adaptive filter applied in series with the line and includes plural transconductance filters each having a bias current. The adaptive filter has a pole and a zero each having a frequency position in the working band that is variable in response to the bias current. The equalizer circuit includes a retroaction circuit applied to the output of the filter and able to vary the bias current according to the varying of the attenuation of the line. The bias current of the transconductance filters has a prefixed value and is made to vary at the increasing of the attenuation so that the pole is moved toward high frequencies and the zero is moved toward low frequencies.

Abstract: A receiving apparatus (1) for receiving signals in a digital telecommunication system and a synchronizing method for synchronizing the receiving apparatus (1). The receiving apparatus (1) includes a receiver (2, 3) for receiving a reference symbol having at least two repetition patterns. One of the repetition patterns is phase-shifted in relation to the other. The receiving apparatus (1) is synchronized in the digital telecommunication system using the received reference symbol. The synchronization includes a cross correlation of at least one of the two repetition patterns within a cross correlation window having a predetermined length. In this manner, the performance and the accuracy of a cross correlation peak detection can be enhanced for improved synchronization.

Abstract: The present invention is provided with a path timing detection unit for detecting path timings of a multi-path; a de-spreading timing setting unit for setting the detected path timings as de-spreading timings, and also for setting as de-spreading timings two timings that are symmetric to the other path timing by setting a delay time between timings of two paths in accordance with respective combinations of two paths of the multi-path on a time axis, while setting a path timing of one path of the two paths as a center; a plurality of correlators for obtaining respective de-spread signals of the reception signals corresponding to the respective set timings; and a signal synthesis unit for synthesizing outputs of the plurality of correlators.

Abstract: An xDSL data transfer system for data transfer includes at least one xDSL user modem connected via a data transfer medium to a corresponding xDSL modem within a central office, in which the xDSL user modem generates a pulse length modulated wake-up signal for switching the corresponding xDSL modem within the central office from a sleep mode to an operation mode.