Patents Examined by Brett A. Feeney
  • Patent number: 12189916
    Abstract: An icon display method includes: receiving a first input performed by a user on a target icon, where the target icon is an icon on at least one first interface; and in response to the first input, displaying the target icon on a second interface in a case that a target quantity reaches a target value. The target quantity is a quantity of icons displayed in fixed icon placeholders on the second interface, and the target value is a quantity of fixed icon placeholders on the second interface. After the target icon is displayed on the second interface, P icons on the second interface are located in non-fixed icon placeholders, P is a quantity of target icons, and P is a positive integer.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: January 7, 2025
    Assignee: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventor: Xiaodong Zhi
  • Patent number: 12174868
    Abstract: A system for displaying refreshment outlooks the system comprising a computing device, the computing device designed and configured to retrieve a user profile from a profile database; determine a refreshment position using the user profile; select current refreshment possibilities contained within the refreshment position; output a refreshment target, using the user profile; compare current refreshment possibilities and the refreshment target; and generate a refreshment outlook.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: December 24, 2024
    Assignee: KPN INNOVATIONS, LLC.
    Inventor: Kenneth Neumann
  • Patent number: 12159019
    Abstract: Systems and methods for improved visualization of events logged by an asset management system are provided herein. In one aspect, a priority index can be determined for respective assets based upon the events they experience. In another aspect, one or more graphical user interfaces (GUIs) can be generated by a computing device for navigation between different assets. The GUIs can allow a user to choose from multiple navigation options for display of assets and respective asset information. As an example, asset views can include views based upon one or more of an asset hierarchy within a fleet, a priority index, or a shortlist of assets based upon personal interests of a user or shared interests of a group, also referred to as a watchlist herein. The GUIs can further allow a user to view summaries of events and/or details regarding events for selected assets, such as alarms and case assignments.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: December 3, 2024
    Assignee: Baker Hughes Holdings LLC
    Inventors: Jojy Tom Chakkalackal, Jacqueline Tappan, Mandar Sadashiv Joshi
  • Patent number: 12153585
    Abstract: Systems, methods, and non-transitory computer readable media for dynamically selecting and sending content items to a user device based on various network and device conditions are provided. In some embodiments, a listing of images stored within a user account on a content management system may be generated, and a selection probability value may be assigned to each image within the listing. An available capacity level on the user device may be determined, and images may be dynamically selected to be sent to the user device based on the determined available capacity level and each image's selection probability value. In some embodiments, each image's selection probability value may be based on one or more factors. For example, images that have been recently viewed, recently added to a collection of images, and/or shared within a shared virtual space created by the user, may receive higher selection probability values than other images.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: November 26, 2024
    Assignee: Dropbox, Inc.
    Inventors: Anthony Grue, Andrew Haven, Andrew Scheff
  • Patent number: 12113118
    Abstract: A method includes forming a silicon liner over a semiconductor device, which includes a dummy gate structure disposed over a substrate and S/D features disposed adjacent to the dummy gate structure, where the dummy gate structure traverses a channel region between the S/D features. The method further includes forming an ILD layer over the silicon liner, which includes elemental silicon, introducing a dopant species to the ILD layer, and subsequently removing the dummy gate structure to form a gate trench. Thereafter, the method proceeds to performing a thermal treatment to the doped ILD layer, thereby oxidizing the silicon liner, and forming a metal gate stack in the gate trench and over the oxidized silicon liner.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: October 8, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Bwo-Ning Chen, Xusheng Wu, Chang-Miao Liu, Shih-Hao Lin
  • Patent number: 12087859
    Abstract: A method to improve transistor performance uses a wafer (100) of single-crystalline semiconductor with a first zone (102) of field effect transistors (FETs) and circuitry at the wafer surface, and an infrared (IR) laser with a lens for focusing the IR light to a second depth (112) farther from the wafer surface than the first depth of the first zone. The focused laser beam is moved parallel to the surface across the wafer to cause local multi-photon absorption at the second depth for transforming the single-crystalline semiconductor into a second zone (111) of polycrystalline semiconductor with high density of dislocations. The second zone has a height and lateral extensions, and permanently stresses the single-crystalline bulk semiconductor; the stress increases the majority carrier mobility in the channel of the FETs, improving the transistor performance.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: September 10, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Steven Kummerl, Matthew John Sherbin, Saumya Gandhi
  • Patent number: 11574903
    Abstract: A first silicon controlled rectifier has a breakdown voltage in a first direction and a breakdown voltage in a second direction. A second silicon controlled rectifier has a breakdown voltage with a higher magnitude than the first silicon controlled rectifier in the first direction, and a breakdown voltage with a lower magnitude than the first silicon controlled rectifier in the second direction. A bidirectional electrostatic discharge (ESD) structure utilizes both the first silicon controlled rectifier and the second silicon controlled rectifier to provide bidirectional protection.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: February 7, 2023
    Assignee: Texas Instmments Incorporated
    Inventors: Henry Litzmann Edwards, Akram A. Salman, Md Iqbal Mahmud
  • Patent number: 10422642
    Abstract: A sensor comprises a substrate 16 and a sensor element 20 anchored to the substrate 16, the substrate 16 and sensor element 20 being of dissimilar materials and having different coefficients of thermal expansion, the sensor element 20 and substrate 16 each having a generally planar face arranged substantially parallel to one another, the sensor further comprising a spacer 26, the spacer 26 being located so as to space at least part of the sensor element 20 from at least part of the substrate 16, wherein the spacer 26 is of considerably smaller area than the area of the smaller of face of the substrate 16 and that of the sensor element 20.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: September 24, 2019
    Assignee: Atlantic Inertial Systems Limited
    Inventor: Christopher Paul Fell
  • Patent number: 10128346
    Abstract: A semiconductor device includes a semiconductor pattern on a substrate along a first direction, a blocking pattern on a top surface of the semiconductor pattern, a first wire pattern on the blocking pattern along a second direction different from the first direction, the first wire including a first part and a second part on opposite sides of the first part, a gate electrode surrounding the first part of the first wire pattern, and a contact surrounding the second part of the first wire pattern, wherein a height of a bottom surface of the contact from a top surface of the substrate is different from a height of a bottom surface of the gate electrode from the top surface of the substrate.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: November 13, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho-Jun Kim, Sung-Dae Suk
  • Patent number: 10109716
    Abstract: A tunable breakdown voltage RF MESFET and/or MOSFET and methods of manufacture are disclosed. The method includes forming a first line and a second line on an underlying gate dielectric material. The second line has a width tuned to a breakdown voltage. The method further includes forming sidewall spacers on sidewalls of the first and second line such that the space between first and second line is pinched-off by the dielectric spacers. The method further includes forming source and drain regions adjacent outer edges of the first line and the second line, and removing at least the second line to form an opening between the sidewall spacers of the second line and to expose the underlying gate dielectric material. The method further includes depositing a layer of material on the underlying gate dielectric material within the opening, and forming contacts to a gate structure and the source and drain regions.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: October 23, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vibhor Jain, Qizhi Liu, John J. Pekarik
  • Patent number: 10109792
    Abstract: A switching device includes a first electrode and a second electrode, and an electrolyte layer disposed between the first electrode and the second electrode. The electrolyte layer includes a first layer charged with negative charges and a second layer charged with positive charges.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: October 23, 2018
    Assignee: SK HYNIX INC.
    Inventor: Hyung Dong Lee
  • Patent number: 9997533
    Abstract: According to one embodiment, the plurality of charge storage films are separated in a stacking direction with a second air gap interposed. The plurality of insulating films are provided on side surfaces of electrode layers opposing the charge storage films, on portions of surfaces of the electrode layers continuous from the side surfaces and opposing a first air gap between the electrode layers, and on corners of the electrode layers between the portions and the side surfaces. The plurality of insulating films are divided in the stacking direction with a third air gap interposed and without the charge storage films being interposed. The third air gap communicates with the first air gap and the second air gap between the first air gap and the second air gap.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: June 12, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Yasuhito Yoshimizu, Satoshi Wakatsuki, Yohei Sato, Keiichi Sawa
  • Patent number: 9997737
    Abstract: A structure including a first resin layer and a second resin layer sandwiching a self-light emitting element layer, a first stopper layer, a first resin sacrificial layer and a first glass substrate which are stacked on the first resin layer on the opposite side of the self-light emitting element layer, and a second glass substrate stacked on the second resin layer is prepared. The first glass substrate is peeled off from the first resin sacrificial layer by irradiating the first glass substrate with a laser beam. The first resin sacrificial layer is decomposed by a chemical reaction using a gas. The first stopper layer has a resistance to the chemical reaction, and the first resin sacrificial layer is removed while leaving the first stopper layer in a step of decomposing the first resin sacrificial layer.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: June 12, 2018
    Assignee: Japan Display Inc.
    Inventors: Kazufumi Watabe, Hiroshi Kawanago
  • Patent number: 9991360
    Abstract: A method for fabricating a semiconductor structure includes forming a semiconductor layer over a substrate and forming an aluminum-silicon nitride layer upon the semiconductor layer. When the semiconductor layer in particular comprises a III-V semiconductor material such as a group III nitride semiconductor material or a gallium nitride semiconductor material, the aluminum-silicon nitride material provides a superior passivation in comparison with a silicon nitride material.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: June 5, 2018
    Assignee: CORNELL UNIVERSITY
    Inventors: James R. Shealy, Richard Brown
  • Patent number: 9991202
    Abstract: A method of forming a semiconductor structure includes forming a first insulating layer containing a first metal layer embedded therein and on a surface of a semiconductor substrate. The method further includes forming an inter-layer dielectric (ILD) layer on the first insulating layer, and forming at least one via trench structure including a first metallization trench and a via in the ILD layer. In addition, the method also includes depositing a metal material to form a first metallization layer in the first metallization trench, a via contact in the via, and a second metal layer on top of at least a portion of the first metal layer in the opening of the first insulating layer. The first metal layer and the second metal layer constitute a multilayer metal contact located in the opening of the first insulating layer.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: June 5, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Jim S. Liang, Justin C. Long, Atsushi Ogino
  • Patent number: 9981842
    Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: May 29, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy, Anthony K. Stamper, Eric J. White
  • Patent number: 9969613
    Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: May 15, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy, Anthony K. Stamper, Eric J. White
  • Patent number: 9938137
    Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: April 10, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy, Anthony K. Stamper, Eric J. White
  • Patent number: 9932222
    Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: April 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy, Anthony K. Stamper, Eric J. White
  • Patent number: 9911654
    Abstract: The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a clamping electrode for electrostatically clamping the work piece to the work piece support; providing a mechanical partition between the plasma source and the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: March 6, 2018
    Assignee: Plasma-Therm LLC
    Inventors: Linnell Martinez, David Pays-Volard, Chris Johnson, David Johnson, Russell Westerman, Gordon M. Grivna