Patents Examined by Brian A. Hearn
  • Patent number: 5273912
    Abstract: A method for manufacturing a semiconductor device including forming an epitaxial layer on a second conductive silicon substrate selectively provided with a first conductive impurity diffusion layer and diffusing a second impurity through surface of the epitaxial layer to form islands of the epitaxial layer, the above epitaxial layer having a higher specific resistance than that of the silicon substrate.
    Type: Grant
    Filed: July 28, 1992
    Date of Patent: December 28, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Satoshi Hikida